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sched_ext: Order single-cid cmask helpers as (cid, mask)

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__scx_cmask_set(), __scx_cmask_contains() and __scx_cmask_word() take the
cmask first and the cid second. The kernel's bit and cpumask predicates put
the index first: test_bit(nr, addr), cpumask_test_cpu(cpu, mask). Reorder
the cmask helpers to (cid, mask) for consistency, ahead of new single-cid
ops added next. Mask-level ops (and/or/andnot/copy/subset/intersects) keep
(dst, src).

Signed-off-by: Tejun Heo <tj@kernel.org>
Reviewed-by: Andrea Righi <arighi@nvidia.com>
This commit is contained in:
Tejun Heo 2026-06-03 15:46:56 -10:00
parent dad8365242
commit 41de4c70b0
2 changed files with 6 additions and 6 deletions
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2
kernel/sched/ext_cid.c
View File

@ -267,7 +267,7 @@ void scx_cpumask_to_cmask(const struct cpumask *src, struct scx_cmask *dst)
s32 cid = __scx_cpu_to_cid(cpu);
if (cid >= 0)
__scx_cmask_set(dst, cid);
__scx_cmask_set(cid, dst);
}
}

10
kernel/sched/ext_cid.h
View File

@ -147,13 +147,13 @@ static inline bool scx_is_cid_type(void)
return static_branch_unlikely(&__scx_is_cid_type);
}
static inline bool __scx_cmask_contains(const struct scx_cmask *m, u32 cid)
static inline bool __scx_cmask_contains(u32 cid, const struct scx_cmask *m)
{
return likely(cid >= m->base && cid < m->base + m->nr_cids);
}
/* Word in bits[] covering @cid. @cid must satisfy __scx_cmask_contains(). */
static inline u64 *__scx_cmask_word(const struct scx_cmask *m, u32 cid)
static inline u64 *__scx_cmask_word(u32 cid, const struct scx_cmask *m)
{
return (u64 *)&m->bits[cid / 64 - m->base / 64];
}
@ -218,11 +218,11 @@ static inline void scx_cmask_reframe(struct scx_cmask *m, u32 base, u32 nr_cids)
m->nr_cids = nr_cids;
}
static inline void __scx_cmask_set(struct scx_cmask *m, u32 cid)
static inline void __scx_cmask_set(u32 cid, struct scx_cmask *m)
{
if (!__scx_cmask_contains(m, cid))
if (!__scx_cmask_contains(cid, m))
return;
*__scx_cmask_word(m, cid) |= BIT_U64(cid & 63);
*__scx_cmask_word(cid, m) |= BIT_U64(cid & 63);
}
#endif /* _KERNEL_SCHED_EXT_CID_H */