From 278b6cabf18bd804f956b98a2f1068717acdbfe3 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 22 Aug 2025 15:34:08 +0200 Subject: [PATCH 01/12] arm64: dts: broadcom: bcm2712: Add default GIC address cells Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: bcm2712.dtsi:494.4-497.31: Warning (interrupt_map): /axi/pcie@1000110000:interrupt-map: Missing property '#address-cells' in node /soc@107c000000/interrupt-controller@7fff9000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20250822133407.312505-2-krzysztof.kozlowski@linaro.org Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi index 0a9212d3106f..940f1c483198 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi @@ -270,6 +270,7 @@ gicv2: interrupt-controller@7fff9000 { <0x7fffc000 0x2000>, <0x7fffe000 0x2000>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <3>; }; From 7e1aa57c2d14908c1faf0bcbf3e746dcf650eaa0 Mon Sep 17 00:00:00 2001 From: "Ivan T. Ivanov" Date: Thu, 28 Aug 2025 15:17:11 +0200 Subject: [PATCH 02/12] arm64: dts: broadcom: bcm2712: Add pin controller nodes Add pin-control devicetree nodes and used them to explicitly define uSD card interface pin configuration. Signed-off-by: Ivan T. Ivanov Reviewed-by: Stefan Wahren Signed-off-by: Andrea della Porta Link: https://lore.kernel.org/r/5ceba8558e0007a9685f19b51d681d0ce79e7634.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 18 ++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 10 ++++++++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts index 6ea3c102e0d6..6091a1ff365c 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts @@ -53,6 +53,21 @@ sd_vcc_reg: sd-vcc-reg { }; }; +&pinctrl { + emmc_sd_default: emmc-sd-default-state { + pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; + bias-pull-up; + }; +}; + +&pinctrl_aon { + emmc_aon_cd_default: emmc-aon-cd-default-state { + function = "sd_card_g"; + pins = "aon_gpio5"; + bias-pull-up; + }; +}; + /* The Debug UART, on Rpi5 it's on JST-SH 1.0mm 3-pin connector * labeled "UART", i.e. the interface with the system console. */ @@ -62,12 +77,15 @@ &uart10 { /* SDIO1 is used to drive the SD card */ &sdio1 { + pinctrl-0 = <&emmc_sd_default>, <&emmc_aon_cd_default>; + pinctrl-names = "default"; vqmmc-supply = <&sd_io_1v8_reg>; vmmc-supply = <&sd_vcc_reg>; bus-width = <4>; sd-uhs-sdr50; sd-uhs-ddr50; sd-uhs-sdr104; + cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>; }; &soc { diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi index 940f1c483198..c1374cf383ae 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi @@ -243,6 +243,16 @@ uart10: serial@7d001000 { status = "disabled"; }; + pinctrl: pinctrl@7d504100 { + compatible = "brcm,bcm2712c0-pinctrl"; + reg = <0x7d504100 0x30>; + }; + + pinctrl_aon: pinctrl@7d510700 { + compatible = "brcm,bcm2712c0-aon-pinctrl"; + reg = <0x7d510700 0x20>; + }; + interrupt-controller@7d517000 { compatible = "brcm,bcm7271-l2-intc"; reg = <0x7d517000 0x10>; From 72eb12b99d3539060d93191c502e7b7e259ead56 Mon Sep 17 00:00:00 2001 From: "Ivan T. Ivanov" Date: Thu, 28 Aug 2025 15:17:12 +0200 Subject: [PATCH 03/12] arm64: dts: broadcom: bcm2712: Add one more GPIO node Add GPIO and related interrupt controller nodes and wire one of the lines to power button. Signed-off-by: Ivan T. Ivanov Signed-off-by: Andrea della Porta Link: https://lore.kernel.org/r/6d311b2f629bbc0e1dd9821e4aa8e5af9f8e5362.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 21 +++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 12 +++++++++++ 2 files changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts index 6091a1ff365c..f0883c903527 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts @@ -2,6 +2,7 @@ /dts-v1/; #include +#include #include "bcm2712.dtsi" / { @@ -29,6 +30,20 @@ memory@0 { reg = <0 0 0 0x28000000>; }; + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_button_default>; + status = "okay"; + + power_button: power-button { + label = "pwr_button"; + linux,code = ; + gpios = <&gio 20 GPIO_ACTIVE_LOW>; + debounce-interval = <50>; + }; + }; + sd_io_1v8_reg: sd-io-1v8-reg { compatible = "regulator-gpio"; regulator-name = "vdd-sd-io"; @@ -58,6 +73,12 @@ emmc_sd_default: emmc-sd-default-state { pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; bias-pull-up; }; + + pwr_button_default: pwr-button-default-state { + function = "gpio"; + pins = "gpio20"; + bias-pull-up; + }; }; &pinctrl_aon { diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi index c1374cf383ae..a1af86208d9e 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi @@ -248,6 +248,18 @@ pinctrl: pinctrl@7d504100 { reg = <0x7d504100 0x30>; }; + gio: gpio@7d508500 { + compatible = "brcm,bcm7445-gpio", "brcm,brcmstb-gpio"; + reg = <0x7d508500 0x40>; + interrupt-parent = <&main_irq>; + interrupts = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + brcm,gpio-bank-widths = <32 22>; + }; + pinctrl_aon: pinctrl@7d510700 { compatible = "brcm,bcm2712c0-aon-pinctrl"; reg = <0x7d510700 0x20>; From 55ec7b1b97267fd552848e7e3ba70cbbfc1eba73 Mon Sep 17 00:00:00 2001 From: "Ivan T. Ivanov" Date: Thu, 28 Aug 2025 15:17:13 +0200 Subject: [PATCH 04/12] arm64: dts: broadcom: bcm2712: Add second SDHCI controller node Add SDIO2 node. On RPi5 it is connected to WiFi chip. Add related pin, gpio and regulator definitions and add WiFi node. With this and firmware already provided by distributions, at least on openSUSE Tumbleweed, this is sufficient to make WiFi operational on RPi5 \o/. Signed-off-by: Ivan T. Ivanov Signed-off-by: Andrea della Porta Link: https://lore.kernel.org/r/4ff3a58e98d90a43deb2448b23754808afc7153b.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 52 +++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 15 ++++++ 2 files changed, 67 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts index f0883c903527..411b58c1dddf 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts @@ -66,6 +66,18 @@ sd_vcc_reg: sd-vcc-reg { enable-active-high; gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; }; + + wl_on_reg: wl-on-reg { + compatible = "regulator-fixed"; + regulator-name = "wl-on-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-0 = <&wl_on_default>; + pinctrl-names = "default"; + gpio = <&gio 28 GPIO_ACTIVE_HIGH>; + startup-delay-us = <150000>; + enable-active-high; + }; }; &pinctrl { @@ -79,6 +91,29 @@ pwr_button_default: pwr-button-default-state { pins = "gpio20"; bias-pull-up; }; + + sdio2_30_default: sdio2-30-default-state { + clk-pins { + function = "sd2"; + pins = "gpio30"; + bias-disable; + }; + cmd-pins { + function = "sd2"; + pins = "gpio31"; + bias-pull-up; + }; + dat-pins { + function = "sd2"; + pins = "gpio32", "gpio33", "gpio34", "gpio35"; + bias-pull-up; + }; + }; + + wl_on_default: wl-on-default-state { + function = "gpio"; + pins = "gpio28"; + }; }; &pinctrl_aon { @@ -109,6 +144,23 @@ &sdio1 { cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>; }; +&sdio2 { + pinctrl-0 = <&sdio2_30_default>; + pinctrl-names = "default"; + bus-width = <4>; + vmmc-supply = <&wl_on_reg>; + sd-uhs-ddr50; + non-removable; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + wifi: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + &soc { firmware: firmware { compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi index a1af86208d9e..6068cb75ef5a 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi @@ -285,6 +285,21 @@ gio_aon: gpio@7d517c00 { */ }; + sdio2: mmc@1100000 { + compatible = "brcm,bcm2712-sdhci", + "brcm,sdhci-brcmstb"; + reg = <0x01100000 0x260>, + <0x01100400 0x200>; + reg-names = "host", "cfg"; + interrupts = ; + clocks = <&clk_emmc2>; + clock-names = "sw_sdio"; + sdhci-caps-mask = <0x0000C000 0x0>; + sdhci-caps = <0x0 0x0>; + mmc-ddr-3_3v; + status = "disabled"; + }; + gicv2: interrupt-controller@7fff9000 { compatible = "arm,gic-400"; reg = <0x7fff9000 0x1000>, From 72323b141691beeab8809c1dc0b98b1bcf058d88 Mon Sep 17 00:00:00 2001 From: "Ivan T. Ivanov" Date: Thu, 28 Aug 2025 15:17:14 +0200 Subject: [PATCH 05/12] arm64: dts: broadcom: bcm2712: Add UARTA controller node On RPi5 device Bluetooth chips is connected to UARTA port. Add Bluetooth chips and related pin definitions. With this and firmware already provided by distributions, at least on openSUSE Tumbleweed, this is sufficient to make Bluetooth operational on RPi5 \o/. Signed-off-by: Ivan T. Ivanov Signed-off-by: Andrea della Porta Link: https://lore.kernel.org/r/35c0da6a741019efefc3c8e405e210a3a8156830.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 42 +++++++++++++++++++ arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 18 ++++++++ 2 files changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts index 411b58c1dddf..04738bf281eb 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts @@ -81,6 +81,11 @@ wl_on_reg: wl-on-reg { }; &pinctrl { + bt_shutdown_default: bt-shutdown-default-state { + function = "gpio"; + pins = "gpio29"; + }; + emmc_sd_default: emmc-sd-default-state { pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; bias-pull-up; @@ -110,6 +115,29 @@ dat-pins { }; }; + uarta_24_default: uarta-24-default-state { + rts-pins { + function = "uart0"; + pins = "gpio24"; + bias-disable; + }; + cts-pins { + function = "uart0"; + pins = "gpio25"; + bias-pull-up; + }; + txd-pins { + function = "uart0"; + pins = "gpio26"; + bias-disable; + }; + rxd-pins { + function = "uart0"; + pins = "gpio27"; + bias-pull-up; + }; + }; + wl_on_default: wl-on-default-state { function = "gpio"; pins = "gpio28"; @@ -188,6 +216,20 @@ power: power { }; }; +/* uarta communicates with the BT module */ +&uarta { + uart-has-rtscts; + pinctrl-0 = <&uarta_24_default &bt_shutdown_default>; + pinctrl-names = "default"; + status = "okay"; + + bluetooth: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>; + }; +}; + &hvs { clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; clock-names = "core", "disp"; diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi index 6068cb75ef5a..e77a66adc22a 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi @@ -38,6 +38,13 @@ clk_emmc2: clk-emmc2 { clock-frequency = <200000000>; clock-output-names = "emmc2-clock"; }; + + clk_sw_baud: clk-sw-baud { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <96000000>; + clock-output-names = "sw-baud"; + }; }; cpus: cpus { @@ -260,6 +267,17 @@ gio: gpio@7d508500 { brcm,gpio-bank-widths = <32 22>; }; + uarta: serial@7d50c000 { + compatible = "brcm,bcm7271-uart"; + reg = <0x7d50c000 0x20>; + reg-names = "uart"; + clocks = <&clk_sw_baud>; + clock-names = "sw_baud"; + interrupts = ; + interrupt-names = "uart"; + status = "disabled"; + }; + pinctrl_aon: pinctrl@7d510700 { compatible = "brcm,bcm2712c0-aon-pinctrl"; reg = <0x7d510700 0x20>; From 725386ca1949a570d8b73b179518998d399031bf Mon Sep 17 00:00:00 2001 From: Andrea della Porta Date: Thu, 28 Aug 2025 15:17:10 +0200 Subject: [PATCH 06/12] dt-bindings: mmc: Add support for capabilities to Broadcom SDHCI controller The Broadcom BRCMSTB SDHCI Controller device supports Common properties in terms of Capabilities. Reference sdhci-common schema instead of mmc-controller in order for capabilities to be specified in DT nodes avoiding warnings from the DT compiler. Signed-off-by: Andrea della Porta Acked-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/181cc905566f2d9b2e5076295cd285230f81ed07.1756386531.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml index eee6be7a7867..493655a38b37 100644 --- a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml +++ b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml @@ -61,7 +61,7 @@ properties: description: Specifies that controller should use auto CMD12 allOf: - - $ref: mmc-controller.yaml# + - $ref: sdhci-common.yaml# - if: properties: clock-names: From cbdd3e7613200ee49ae8fa00020c39c4a2e1ee42 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Fri, 22 Aug 2025 12:34:39 +0300 Subject: [PATCH 07/12] arm64: dts: rp1: Add ethernet DT node Add macb GEM ethernet DT node. Signed-off-by: Stanimir Varbanov Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20250822093440.53941-5-svarbanov@suse.de Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/rp1-common.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/rp1-common.dtsi b/arch/arm64/boot/dts/broadcom/rp1-common.dtsi index 5002a375eb0b..6bdc304c5f24 100644 --- a/arch/arm64/boot/dts/broadcom/rp1-common.dtsi +++ b/arch/arm64/boot/dts/broadcom/rp1-common.dtsi @@ -39,4 +39,20 @@ rp1_gpio: pinctrl@400d0000 { <1 IRQ_TYPE_LEVEL_HIGH>, <2 IRQ_TYPE_LEVEL_HIGH>; }; + + rp1_eth: ethernet@40100000 { + compatible = "raspberrypi,rp1-gem"; + reg = <0x00 0x40100000 0x0 0x4000>; + interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rp1_clocks RP1_CLK_SYS>, + <&rp1_clocks RP1_CLK_SYS>, + <&rp1_clocks RP1_CLK_ETH>, + <&rp1_clocks RP1_CLK_ETH_TSU>; + clock-names = "pclk", "hclk", "tx_clk", "tsu_clk"; + local-mac-address = [00 00 00 00 00 00]; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <0>; + }; }; From 43456fdfc014f302fdcbb85903efe9548330dc32 Mon Sep 17 00:00:00 2001 From: Stanimir Varbanov Date: Fri, 22 Aug 2025 12:34:40 +0300 Subject: [PATCH 08/12] arm64: dts: broadcom: Enable RP1 ethernet for Raspberry Pi 5 Enable RP1 ethernet DT node for Raspberry Pi 5. Signed-off-by: Stanimir Varbanov Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20250822093440.53941-6-svarbanov@suse.de Signed-off-by: Florian Fainelli --- .../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts index a70a9b158df3..c70d1cb7f3b6 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -23,3 +23,21 @@ &pcie1 { &pcie2 { status = "okay"; }; + +&rp1_eth { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <&phy1>; + + mdio { + reg = <0x1>; + reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>; + reset-delay-us = <5000>; + #address-cells = <1>; + #size-cells = <0>; + + phy1: ethernet-phy@1 { + reg = <0x1>; + }; + }; +}; From 2cb82bf8c160117b4036865e75f9997a84aa6cd7 Mon Sep 17 00:00:00 2001 From: Andrea della Porta Date: Mon, 11 Aug 2025 16:12:34 +0200 Subject: [PATCH 09/12] arm64: dts: broadcom: delete redundant pcie enablement nodes The pcie1 and pcie2 override nodes to enable the respective peripherals are declared both in bcm2712-rpi-5-b.dts and bcm2712-rpi-5-b-ovl-rp1.dts, which makes those declared in the former file redundant. Drop those redundant nodes from the board devicetree. Signed-off-by: Andrea della Porta Link: https://lore.kernel.org/r/2865b787d893fd1dcf816e1c96856711754d612d.1754914766.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts index c70d1cb7f3b6..55dbacf5a6fc 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -16,14 +16,6 @@ &pcie2 { #include "rp1-nexus.dtsi" }; -&pcie1 { - status = "okay"; -}; - -&pcie2 { - status = "okay"; -}; - &rp1_eth { status = "okay"; phy-mode = "rgmii-id"; From 911b1a6443bbdeed25c5459768793953bf846dcb Mon Sep 17 00:00:00 2001 From: Andrea della Porta Date: Mon, 11 Aug 2025 16:12:35 +0200 Subject: [PATCH 10/12] arm64: dts: broadcom: amend the comment about the role of BCM2712 board DTS Current board DTS for Raspberry Pi5 states that bcm2712-rpi-5-b.dts should not be modified and all declarations should go in the overlay board DTS instead (bcm2712-rpi-5-b-ovl-rp1.dts). There's a caveat though: there's currently no infrastructure to reliably reference nodes that have not been declared yet, as is the case when loading those nodes from a runtime overlay. For more details about these limitations see [1] and follow-ups. Change the comment to make it clear which DTS file will host specific nodes, especially the RP1 related nodes which should be customized outside the overlay DTS. Link [1] - https://lore.kernel.org/all/CAMEGJJ3=W8_R0xBvm8r+Q7iExZx8xPBHEWWGAT9ngpGWDSKCaQ@mail.gmail.com/ Signed-off-by: Andrea della Porta Link: https://lore.kernel.org/r/47f6368a77d6bd846c02942d20c07dd48e0ae7df.1754914766.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts index 55dbacf5a6fc..2045a221c393 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -4,8 +4,14 @@ * the RP1 driver to load the RP1 dtb overlay at runtime, while * bcm2712-rpi-5-b.dts (this file) is the fully defined one (i.e. it * already contains RP1 node, so no overlay is loaded nor needed). - * This file is not intended to be modified, nodes should be added - * to the included bcm2712-rpi-5-b-ovl-rp1.dts. + * This file is intended to host the override nodes for the RP1 peripherals, + * e.g. to declare the phy of the ethernet interface or the custom pin setup + * for several RP1 peripherals. + * This in turn is due to the fact that there's no current generic + * infrastructure to reference nodes (i.e. the nodes in rp1-common.dtsi) that + * are not yet defined in the DT since they are loaded at runtime via overlay. + * All other nodes that do not have anything to do with RP1 should be added + * to the included bcm2712-rpi-5-b-ovl-rp1.dts instead. */ /dts-v1/; From b11aa9565f800fe33369936a1730de2e344ea5ef Mon Sep 17 00:00:00 2001 From: Andrea della Porta Date: Fri, 5 Sep 2025 11:42:39 +0200 Subject: [PATCH 11/12] arm64: dts: broadcom: rp1: Add USB nodes The RaspberryPi 5 has RP1 chipset containing two USB host controller, while presenting two USB 2.0 and two USB 3.0 ports to the outside. Add the relevant USB nodes to the devicetree. Signed-off-by: Andrea della Porta Link: https://lore.kernel.org/r/16d753cb4bf37beb5e9c6f0e03576cf13708f27d.1757065053.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- arch/arm64/boot/dts/broadcom/rp1-common.dtsi | 28 ++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/rp1-common.dtsi b/arch/arm64/boot/dts/broadcom/rp1-common.dtsi index 6bdc304c5f24..5a815c379794 100644 --- a/arch/arm64/boot/dts/broadcom/rp1-common.dtsi +++ b/arch/arm64/boot/dts/broadcom/rp1-common.dtsi @@ -55,4 +55,32 @@ rp1_eth: ethernet@40100000 { #address-cells = <1>; #size-cells = <0>; }; + + rp1_usb0: usb@40200000 { + compatible = "snps,dwc3"; + reg = <0x00 0x40200000 0x0 0x100000>; + interrupts = <31 IRQ_TYPE_EDGE_RISING>; + dr_mode = "host"; + usb3-lpm-capable; + snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + snps,tx-max-burst = /bits/ 8 <8>; + snps,tx-thr-num-pkt = /bits/ 8 <2>; + status = "disabled"; + }; + + rp1_usb1: usb@40300000 { + compatible = "snps,dwc3"; + reg = <0x00 0x40300000 0x0 0x100000>; + interrupts = <36 IRQ_TYPE_EDGE_RISING>; + dr_mode = "host"; + usb3-lpm-capable; + snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; + snps,tx-max-burst = /bits/ 8 <8>; + snps,tx-thr-num-pkt = /bits/ 8 <2>; + status = "disabled"; + }; }; From 70bab1937e39fd8f6efc80fd1a8b4da63622dd81 Mon Sep 17 00:00:00 2001 From: Andrea della Porta Date: Fri, 5 Sep 2025 11:42:40 +0200 Subject: [PATCH 12/12] arm64: dts: broadcom: Enable USB devicetree entries for Rpi5 RaspberryPi 5 presents two USB 2.0 and two USB 3.0 ports. Configure and enable the USB nodes in the devicetree. Signed-off-by: Andrea della Porta Link: https://lore.kernel.org/r/c6b17f0f896b5cdd790fc10aeb2b76b71df9b58d.1757065053.git.andrea.porta@suse.com Signed-off-by: Florian Fainelli --- .../arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts index 2045a221c393..b8f256545022 100644 --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -39,3 +39,20 @@ phy1: ethernet-phy@1 { }; }; }; + +&rp1_gpio { + usb_vbus_default_state: usb-vbus-default-state { + function = "vbus1"; + groups = "vbus1"; + }; +}; + +&rp1_usb0 { + pinctrl-0 = <&usb_vbus_default_state>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rp1_usb1 { + status = "okay"; +};