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arm64: dts: imx8mp-var-dart: Add support for Variscite Sonata board
Add device tree support for the Variscite Sonata carrier board with the DART-MX8M-PLUS system on module. The Sonata board includes - uSD Card support - USB ports and OTG - Additional Gigabit Ethernet interface - Uart, SPI and I2C interfaces - HDMI support - GPIO Expanders - RTC module - TPM module - CAN peripherals Link: https://variscite.com/carrier-boards/sonata-board/ Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Stefano Radaelli
Frank Li
parent
d08607aa23
commit
41cd3d91ca
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@ -453,6 +453,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av101hdt-a10.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-tx8p-ml81-moduline-display-106-av123z7m-n17.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-ultra-mach-sbc.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-dart-sonata.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-var-som-symphony.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw71xx-2x.dtb
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dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw72xx-2x.dtb
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733
arch/arm64/boot/dts/freescale/imx8mp-var-dart-sonata.dts
Normal file
733
arch/arm64/boot/dts/freescale/imx8mp-var-dart-sonata.dts
Normal file
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@ -0,0 +1,733 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Variscite Sonata carrier board for DART-MX8M-PLUS
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*
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* Link: https://variscite.com/carrier-boards/sonata-board/
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*
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* Copyright (C) 2026 Variscite Ltd. - https://www.variscite.com/
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*
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*/
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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#include "imx8mp-var-dart.dtsi"
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/ {
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model = "Variscite DART-MX8M-PLUS on Sonata-Board";
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compatible = "variscite,var-dart-mx8mp-sonata",
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"variscite,var-dart-mx8mp",
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"fsl,imx8mp";
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chosen {
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stdout-path = &uart1;
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-home {
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label = "Home";
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linux,code = <KEY_HOME>;
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gpios = <&pca6408_1 4 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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button-up {
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label = "Up";
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linux,code = <KEY_UP>;
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gpios = <&pca6408_1 5 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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button-down {
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label = "Down";
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linux,code = <KEY_DOWN>;
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gpios = <&pca6408_1 6 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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button-back {
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label = "Back";
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linux,code = <KEY_BACK>;
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gpios = <&pca6408_1 7 GPIO_ACTIVE_LOW>;
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wakeup-source;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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led-emmc {
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gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;
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label = "eMMC";
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linux,default-trigger = "mmc2";
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};
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};
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native-hdmi-connector {
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compatible = "hdmi-connector";
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label = "HDMI OUT";
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type = "a";
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port {
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hdmi_in: endpoint {
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remote-endpoint = <&hdmi_tx_out>;
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};
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};
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};
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clk40m: oscillator {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <40000000>;
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clock-output-names = "can_osc";
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};
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pcie0_refclk: pcie0-refclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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reg_usdhc2_vmmc: regulator-vmmc-usdhc2 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_vmmc_usdhc2>;
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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off-on-delay-us = <12000>;
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};
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sound-hdmi {
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compatible = "fsl,imx-audio-hdmi";
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model = "audio-hdmi";
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audio-cpu = <&aud2htx>;
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hdmi-out;
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};
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sound-xcvr {
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compatible = "fsl,imx-audio-card";
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model = "imx-audio-xcvr";
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pri-dai-link {
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link-name = "XCVR PCM";
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cpu {
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sound-dai = <&xcvr>;
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};
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};
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};
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};
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&aud2htx {
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status = "okay";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>,
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<&gpio1 12 GPIO_ACTIVE_LOW>;
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status = "okay";
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ads7846: touchscreen@0 {
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compatible = "ti,ads7846";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_restouch>;
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interrupt-parent = <&gpio1>;
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interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
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spi-max-frequency = <1500000>;
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pendown-gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
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ti,x-min = /bits/ 16 <125>;
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ti,x-max = /bits/ 16 <4008>;
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ti,y-min = /bits/ 16 <282>;
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ti,y-max = /bits/ 16 <3864>;
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ti,x-plate-ohms = /bits/ 16 <180>;
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ti,pressure-max = /bits/ 16 <255>;
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ti,debounce-max = /bits/ 16 <10>;
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ti,debounce-tol = /bits/ 16 <3>;
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ti,debounce-rep = /bits/ 16 <1>;
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ti,settle-delay-usec = /bits/ 16 <150>;
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ti,keep-vref-on;
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wakeup-source;
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};
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can0: can@1 {
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compatible = "microchip,mcp251xfd";
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reg = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can>;
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interrupt-parent = <&gpio1>;
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interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
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microchip,rx-int-gpios = <&gpio5 4 GPIO_ACTIVE_LOW>;
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clocks = <&clk40m>;
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spi-max-frequency = <20000000>;
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};
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};
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&eqos {
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mdio {
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ethphy1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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reset-gpios = <&pca6408_2 0 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <20000>;
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vddio-supply = <®_phy_vddio>;
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_LAN;
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linux,default-trigger = "netdev";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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linux,default-trigger = "netdev";
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};
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};
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};
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};
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};
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ðphy0 {
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_LAN;
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linux,default-trigger = "netdev";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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linux,default-trigger = "netdev";
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};
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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/*
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* The required RGMII TX and RX 2ns delays are implemented directly
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* in hardware via passive delay elements on the SOM PCB.
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* No delay configuration is needed in software via PHY driver.
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*/
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phy-mode = "rgmii";
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phy-handle = <ðphy1>;
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status = "okay";
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&flexcan2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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status = "okay";
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};
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&hdmi_pai {
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status = "okay";
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};
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&hdmi_pvi {
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status = "okay";
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};
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&hdmi_tx {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hdmi>;
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status = "okay";
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ports {
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port@1 {
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hdmi_tx_out: endpoint {
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remote-endpoint = <&hdmi_in>;
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};
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};
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};
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};
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&hdmi_tx_phy {
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status = "okay";
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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pca9534: gpio@22 {
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compatible = "nxp,pca9534";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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eth10g-en-hog {
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gpio-hog;
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gpios = <5 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "eth10g_sel";
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};
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pcie2-en-hog {
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gpio-hog;
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gpios = <6 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "pcie2_sel";
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};
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/* RGB_SEL
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* Keep signal low and not floating
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*/
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lvds-brg-enable-hog {
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gpio-hog;
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gpios = <7 GPIO_ACTIVE_HIGH>;
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output-low;
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line-name = "lvds_brg_en";
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};
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};
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/* Capacitive touch controller */
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ft5x06_ts: touchscreen@38 {
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compatible = "edt,edt-ft5206";
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reg = <0x38>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_captouch>;
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reset-gpios = <&pca6408_2 4 GPIO_ACTIVE_LOW>;
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interrupt-parent = <&gpio1>;
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interrupts = <14 IRQ_TYPE_EDGE_FALLING>;
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touchscreen-size-x = <800>;
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touchscreen-size-y = <480>;
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touchscreen-inverted-x;
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touchscreen-inverted-y;
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wakeup-source;
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};
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typec@3d {
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compatible = "nxp,ptn5150";
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reg = <0x3d>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_extcon>;
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interrupt-parent = <&gpio1>;
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interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
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port {
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typec_dr_sw: endpoint {
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remote-endpoint = <&usb3_drd_sw>;
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};
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};
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};
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rtc@68 {
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compatible = "dallas,ds1337";
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reg = <0x68>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rtc>;
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interrupt-parent = <&gpio1>;
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interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
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wakeup-source;
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};
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};
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c3>;
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pinctrl-1 = <&pinctrl_i2c3_gpio>;
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scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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};
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&i2c4 {
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clock-frequency = <400000>;
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pinctrl-names = "default", "gpio";
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pinctrl-0 = <&pinctrl_i2c4>;
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pinctrl-1 = <&pinctrl_i2c4_gpio>;
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scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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pca6408_1: gpio@20 {
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compatible = "nxp,pcal6408";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pca6408>;
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interrupt-parent = <&gpio1>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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};
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pca6408_2: gpio@21 {
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compatible = "nxp,pcal6408";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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};
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st33ktpm2xi2c: tpm@2e {
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compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c";
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reg = <0x2e>;
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label = "tpm";
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reset-gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;
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};
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};
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&lcdif3 {
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status = "okay";
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};
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&pcie {
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reset-gpios = <&pca6408_2 3 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pcie_phy {
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fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
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clocks = <&pcie0_refclk>;
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clock-names = "ref";
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status = "okay";
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};
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&pwm1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm1>;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "okay";
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};
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&snvs_rtc {
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status = "disabled";
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};
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/* Console */
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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/* Header */
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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||||
};
|
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/* Header */
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
|
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status = "okay";
|
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};
|
||||
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&usb3_0 {
|
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status = "okay";
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};
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|
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&usb3_1 {
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status = "okay";
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||||
};
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|
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&usb_dwc3_0 {
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dr_mode = "otg";
|
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hnp-disable;
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srp-disable;
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adp-disable;
|
||||
usb-role-switch;
|
||||
snps,dis-u1-entry-quirk;
|
||||
snps,dis-u2-entry-quirk;
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
usb3_drd_sw: endpoint {
|
||||
remote-endpoint = <&typec_dr_sw>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&usb_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy0 {
|
||||
fsl,phy-tx-vref-tune-percent = <122>;
|
||||
fsl,phy-tx-preemp-amp-tune-microamp = <1800>;
|
||||
fsl,phy-tx-vboost-level-microvolt = <1156>;
|
||||
fsl,phy-comp-dis-tune-percent = <115>;
|
||||
fsl,phy-pcs-tx-deemph-3p5db-attenuation-db = <33>;
|
||||
fsl,phy-pcs-tx-swing-full-percent = <100>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb3_phy1 {
|
||||
fsl,phy-tx-preemp-amp-tune-microamp = <1800>;
|
||||
fsl,phy-tx-vref-tune-percent = <116>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usdhc2 {
|
||||
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
||||
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
|
||||
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
||||
vmmc-supply = <®_usdhc2_vmmc>;
|
||||
bus-width = <4>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&xcvr {
|
||||
#sound-dai-cells = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_can: cangrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO06__GPIO1_IO06 0x1c6
|
||||
MX8MP_IOMUXC_SPDIF_RX__GPIO5_IO04 0x16
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_captouch: captouchgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x16
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_ecspi1: ecspi1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_ECSPI1_SCLK__ECSPI1_SCLK 0x12
|
||||
MX8MP_IOMUXC_ECSPI1_MOSI__ECSPI1_MOSI 0x12
|
||||
MX8MP_IOMUXC_ECSPI1_MISO__ECSPI1_MISO 0x12
|
||||
MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x12
|
||||
MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x12
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_extcon: extcongrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x10
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_fec: fecgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
|
||||
MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
|
||||
MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
|
||||
MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x1d0
|
||||
MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
|
||||
MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
|
||||
MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x00
|
||||
MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x00
|
||||
MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x00
|
||||
MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x00
|
||||
MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x00
|
||||
MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x00
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan1: flexcan1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_RXC__CAN1_TX 0x154
|
||||
MX8MP_IOMUXC_SAI2_TXC__CAN1_RX 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_flexcan2: flexcan2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI2_MCLK__CAN2_RX 0x154
|
||||
MX8MP_IOMUXC_SAI2_TXD0__CAN2_TX 0x154
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_leds: ledgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0xc6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_hdmi: hdmigrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_HDMI_DDC_SCL__HDMIMIX_HDMI_SCL 0x1c2
|
||||
MX8MP_IOMUXC_HDMI_DDC_SDA__HDMIMIX_HDMI_SDA 0x1c2
|
||||
MX8MP_IOMUXC_HDMI_CEC__HDMIMIX_HDMI_CEC 0x10
|
||||
MX8MP_IOMUXC_HDMI_HPD__HDMIMIX_HDMI_HPD 0x10
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2: i2c2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c2_gpio: i2c2gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16 0x1c2
|
||||
MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17 0x1c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3: i2c3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c3_gpio: i2c3gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18 0x1c2
|
||||
MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19 0x1c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4: i2c4grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
|
||||
MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_i2c4_gpio: i2c4gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20 0x1c2
|
||||
MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x1c2
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pca6408: pca6408grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x1c6
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm1: pwm1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x116
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_restouch: restouchgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_rtc: rtcgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0x1c0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x40
|
||||
MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart2: uart2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40
|
||||
MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3: uart3grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x40
|
||||
MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2: usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
||||
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
||||
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
||||
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_vmmc_usdhc2: regvmmc-usdhc2grp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_usdhc2_gpio: usdhc2-gpiogrp {
|
||||
fsl,pins = <
|
||||
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
||||
>;
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user