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net: sparx5: configure serdes for 1000BASE-X in sparx5_port_init()
sparx5_port_init() only invokes sparx5_serdes_set() and the associated
shadow-device enable and low-speed device switch for SGMII and QSGMII.
On any port with a high-speed primary device (DEV5G/DEV10G/DEV25G)
configured for 1000BASE-X the serdes is therefore left uninitialized,
the DEV2G5 shadow is never enabled, and the port stays pointed at its
high-speed device rather than the DEV2G5. The PCS1G block looks
healthy in isolation, but no frames reach the link partner.
Add 1000BASE-X to the check so the same three steps run.
Note: the same issue might apply to 2500BASE-X, but that will,
eventually, be addressed in a separate commit.
Reported-by: Andrew Lunn <andrew@lunn.ch>
Fixes: 946e7fd505 ("net: sparx5: add port module support")
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20260506-misc-fixes-sparx5-lan969x-v2-4-fb236aa96908@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
parent
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commit
41ae14071c
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@ -1128,7 +1128,8 @@ int sparx5_port_init(struct sparx5 *sparx5,
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DEV2G5_PCS1G_SD_CFG(port->portno));
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if (conf->portmode == PHY_INTERFACE_MODE_QSGMII ||
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conf->portmode == PHY_INTERFACE_MODE_SGMII) {
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conf->portmode == PHY_INTERFACE_MODE_SGMII ||
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conf->portmode == PHY_INTERFACE_MODE_1000BASEX) {
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err = sparx5_serdes_set(sparx5, port, conf);
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if (err)
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return err;
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