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drm/i915: rename I915_PMU_MAX_GTS to I915_PMU_MAX_GT
_GTS as an abbreviation here leads to some confusion, match other definitions and drop the s. Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Ashutosh Dixit <ashutosh.dixit@linux.intel.com> Cc: Andi Shyti <andy.shyti@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Cc: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230602231754.1596433-3-matthew.s.atwood@intel.com
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@ -132,7 +132,7 @@ static u32 frequency_enabled_mask(void)
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unsigned int i;
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u32 mask = 0;
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for (i = 0; i < I915_PMU_MAX_GTS; i++)
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for (i = 0; i < I915_PMU_MAX_GT; i++)
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mask |= config_mask(__I915_PMU_ACTUAL_FREQUENCY(i)) |
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config_mask(__I915_PMU_REQUESTED_FREQUENCY(i));
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@ -38,7 +38,7 @@ enum {
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__I915_NUM_PMU_SAMPLERS
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};
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#define I915_PMU_MAX_GTS 2
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#define I915_PMU_MAX_GT 2
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/*
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* How many different events we track in the global PMU mask.
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@ -47,7 +47,7 @@ enum {
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*/
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#define I915_PMU_MASK_BITS \
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(I915_ENGINE_SAMPLE_COUNT + \
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I915_PMU_MAX_GTS * __I915_PMU_TRACKED_EVENT_COUNT)
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I915_PMU_MAX_GT * __I915_PMU_TRACKED_EVENT_COUNT)
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#define I915_ENGINE_SAMPLE_COUNT (I915_SAMPLE_SEMA + 1)
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@ -127,11 +127,11 @@ struct i915_pmu {
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* Only global counters are held here, while the per-engine ones are in
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* struct intel_engine_cs.
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*/
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struct i915_pmu_sample sample[I915_PMU_MAX_GTS][__I915_NUM_PMU_SAMPLERS];
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struct i915_pmu_sample sample[I915_PMU_MAX_GT][__I915_NUM_PMU_SAMPLERS];
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/**
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* @sleep_last: Last time GT parked for RC6 estimation.
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*/
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ktime_t sleep_last[I915_PMU_MAX_GTS];
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ktime_t sleep_last[I915_PMU_MAX_GT];
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/**
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* @irq_count: Number of interrupts
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*
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