github-mirror/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-05-28 09:04:39 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity Graph

arm64: dts: mediatek: mt8186: Add GCE node

Browse Source 
Add the Global Command Engine (GCE) node for MT8186 SoC

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230324021258.15863-6-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Allen-KH Cheng 2023-03-24 10:12:57 +08:00 committed by Matthias Brugger
parent 4dad4f32ba
commit 4121884773
1 changed files with 10 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm64/boot/dts/mediatek/mt8186.dtsi
View File

@ -5,6 +5,7 @@
*/
/dts-v1/;
#include <dt-bindings/clock/mt8186-clk.h>
#include <dt-bindings/gce/mt8186-gce.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/memory/mt8186-memory-port.h>
@ -626,6 +627,15 @@ systimer: timer@10017000 {
clocks = <&clk13m>;
};
gce: mailbox@1022c000 {
compatible = "mediatek,mt8186-gce";
reg = <0 0X1022c000 0 0x4000>;
clocks = <&infracfg_ao CLK_INFRA_AO_GCE>;
clock-names = "gce";
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
#mbox-cells = <2>;
};
scp: scp@10500000 {
compatible = "mediatek,mt8186-scp";
reg = <0 0x10500000 0 0x40000>,