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arm64: dts: renesas: r8a779g0: Add CMT node

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Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com>
[wsa: merged the fixes into this one and rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20221104151135.4706-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Thanh Quan 2022-11-04 16:11:34 +01:00 committed by Geert Uytterhoeven
parent 278f5015a3
commit 40a6dd7b94
1 changed files with 70 additions and 0 deletions
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70
arch/arm64/boot/dts/renesas/r8a779g0.dtsi
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@ -214,6 +214,76 @@ gpio8: gpio@e6068180 {
#interrupt-cells = <2>;
};
cmt0: timer@e60f0000 {
compatible = "renesas,r8a779g0-cmt0",
"renesas,rcar-gen4-cmt0";
reg = <0 0xe60f0000 0 0x1004>;
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 910>;
clock-names = "fck";
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
resets = <&cpg 910>;
status = "disabled";
};
cmt1: timer@e6130000 {
compatible = "renesas,r8a779g0-cmt1",
"renesas,rcar-gen4-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 911>;
clock-names = "fck";
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
resets = <&cpg 911>;
status = "disabled";
};
cmt2: timer@e6140000 {
compatible = "renesas,r8a779g0-cmt1",
"renesas,rcar-gen4-cmt1";
reg = <0 0xe6140000 0 0x1004>;
interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 912>;
clock-names = "fck";
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
resets = <&cpg 912>;
status = "disabled";
};
cmt3: timer@e6148000 {
compatible = "renesas,r8a779g0-cmt1",
"renesas,rcar-gen4-cmt1";
reg = <0 0xe6148000 0 0x1004>;
interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 913>;
clock-names = "fck";
power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>;
resets = <&cpg 913>;
status = "disabled";
};
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a779g0-cpg-mssr";
reg = <0 0xe6150000 0 0x4000>;