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drm/i915/xe3lpd: Update bandwidth parameters
Bandwidth parameters for Xe3_LPD have been updated with respect to previous display releases. Encode them into xe3lpd_sa_info and use that new struct. Bspec: 68859 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250311-xe3lpd-bandwidth-update-v5-3-a95a9d90ad71@intel.com Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
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@ -404,6 +404,13 @@ static const struct intel_sa_info xe2_hpd_sa_info = {
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/* Other values not used by simplified algorithm */
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};
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static const struct intel_sa_info xe3lpd_sa_info = {
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.deburst = 32,
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.deprogbwlimit = 65, /* GB/s */
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.displayrtids = 256,
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.derating = 10,
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};
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static int icl_get_bw_info(struct intel_display *display, const struct intel_sa_info *sa)
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{
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struct drm_i915_private *i915 = to_i915(display->drm);
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@ -752,7 +759,9 @@ void intel_bw_init_hw(struct intel_display *display)
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if (!HAS_DISPLAY(display))
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return;
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if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx)
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if (DISPLAY_VER(display) >= 30)
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tgl_get_bw_info(display, &xe3lpd_sa_info);
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else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx)
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xe2_hpd_get_bw_info(display, &xe2_hpd_sa_info);
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else if (DISPLAY_VER(display) >= 14)
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tgl_get_bw_info(display, &mtl_sa_info);
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