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drm/nouveau/gr/gv100-: port smid mapping code from nvgpu
Essentially ripped verbatim from NVGPU, comments and all, and adapted to nvkm's structs and style. - maybe fixes an nvgpu bug though, a small tweak was needed to match RM v2: - remove unnecessary WARN_ON Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com>
This commit is contained in:
Ben Skeggs
parent
d94ac9ddde
commit
3ffa6f329b
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@ -157,6 +157,9 @@ static void
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gv100_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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tpc = gv100_gr_nonpes_aware_tpc(gr, gpc, tpc);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x608), sm);
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nvkm_wr32(device, GPC_UNIT(gpc, 0x0c10 + tpc * 4), sm);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x088), sm);
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@ -34,6 +34,9 @@ static void
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tu102_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
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{
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struct nvkm_device *device = gr->base.engine.subdev.device;
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tpc = gv100_gr_nonpes_aware_tpc(gr, gpc, tpc);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x608), sm);
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nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x088), sm);
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}
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@ -1889,10 +1889,11 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
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return ret;
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}
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void
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int
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gf100_gr_oneinit_sm_id(struct gf100_gr *gr)
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{
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int tpc, gpc;
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for (tpc = 0; tpc < gr->tpc_max; tpc++) {
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for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
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if (tpc < gr->tpc_nr[gpc]) {
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@ -1902,6 +1903,8 @@ gf100_gr_oneinit_sm_id(struct gf100_gr *gr)
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}
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}
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}
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return 0;
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}
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void
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@ -2019,6 +2022,8 @@ gf100_gr_oneinit(struct nvkm_gr *base)
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if (gr->ppc_tpc_max < gr->ppc_tpc_nr[i][j])
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gr->ppc_tpc_max = gr->ppc_tpc_nr[i][j];
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}
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gr->ppc_total += gr->ppc_nr[i];
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}
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/* Allocate global context buffers. */
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@ -2046,8 +2051,8 @@ gf100_gr_oneinit(struct nvkm_gr *base)
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memset(gr->tile, 0xff, sizeof(gr->tile));
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gr->func->oneinit_tiles(gr);
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gr->func->oneinit_sm_id(gr);
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return 0;
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return gr->func->oneinit_sm_id(gr);
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}
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static int
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@ -107,6 +107,7 @@ struct gf100_gr {
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u8 ppc_tpc_nr[GPC_MAX][4];
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u8 ppc_tpc_min;
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u8 ppc_tpc_max;
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u8 ppc_total;
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struct nvkm_memory *pagepool;
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struct nvkm_memory *bundle_cb;
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@ -141,7 +142,7 @@ struct gf100_gr_func_zbc {
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struct gf100_gr_func {
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void (*oneinit_tiles)(struct gf100_gr *);
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void (*oneinit_sm_id)(struct gf100_gr *);
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int (*oneinit_sm_id)(struct gf100_gr *);
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int (*init)(struct gf100_gr *);
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void (*init_419bd8)(struct gf100_gr *);
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void (*init_gpc_mmu)(struct gf100_gr *);
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@ -191,7 +192,7 @@ struct gf100_gr_func {
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int gf100_gr_rops(struct gf100_gr *);
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void gf100_gr_oneinit_tiles(struct gf100_gr *);
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void gf100_gr_oneinit_sm_id(struct gf100_gr *);
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int gf100_gr_oneinit_sm_id(struct gf100_gr *);
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int gf100_gr_init(struct gf100_gr *);
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void gf100_gr_init_vsc_stream_master(struct gf100_gr *);
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void gf100_gr_init_zcull(struct gf100_gr *);
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@ -228,7 +229,7 @@ int gk20a_gr_aiv_to_init(struct nvkm_blob *, struct gf100_gr_pack **);
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int gk20a_gr_av_to_method(struct nvkm_blob *, struct gf100_gr_pack **);
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void gm200_gr_oneinit_tiles(struct gf100_gr *);
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void gm200_gr_oneinit_sm_id(struct gf100_gr *);
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int gm200_gr_oneinit_sm_id(struct gf100_gr *);
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int gm200_gr_rops(struct gf100_gr *);
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void gm200_gr_init_num_active_ltcs(struct gf100_gr *);
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void gm200_gr_init_ds_hww_esr_2(struct gf100_gr *);
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@ -245,6 +246,8 @@ extern const struct gf100_gr_func_zbc gp102_gr_zbc;
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extern const struct gf100_gr_func gp107_gr;
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int gv100_gr_oneinit_sm_id(struct gf100_gr *);
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u32 gv100_gr_nonpes_aware_tpc(struct gf100_gr *gr, u32 gpc, u32 tpc);
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void gv100_gr_init_419bd8(struct gf100_gr *);
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void gv100_gr_init_504430(struct gf100_gr *, int, int);
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void gv100_gr_init_shader_exceptions(struct gf100_gr *, int, int);
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@ -148,11 +148,11 @@ gm200_gr_tile_map_2_8[] = {
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0, 1, 1, 0, 0, 1, 1, 0,
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};
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void
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int
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gm200_gr_oneinit_sm_id(struct gf100_gr *gr)
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{
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/*XXX: There's a different algorithm here I've not yet figured out. */
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gf100_gr_oneinit_sm_id(gr);
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return gf100_gr_oneinit_sm_id(gr);
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}
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void
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@ -85,10 +85,202 @@ gv100_gr_init_419bd8(struct gf100_gr *gr)
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nvkm_mask(device, 0x419bd8, 0x00000700, 0x00000000);
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}
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u32
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gv100_gr_nonpes_aware_tpc(struct gf100_gr *gr, u32 gpc, u32 tpc)
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{
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u32 pes, temp, tpc_new = 0;
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for (pes = 0; pes < gr->ppc_nr[gpc]; pes++) {
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if (gr->ppc_tpc_mask[gpc][pes] & BIT(tpc))
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break;
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tpc_new += gr->ppc_tpc_nr[gpc][pes];
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}
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temp = (BIT(tpc) - 1) & gr->ppc_tpc_mask[gpc][pes];
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temp = hweight32(temp);
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return tpc_new + temp;
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}
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static int
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gv100_gr_scg_estimate_perf(struct gf100_gr *gr, unsigned long *gpc_tpc_mask,
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u32 disable_gpc, u32 disable_tpc, int *perf)
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{
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const u32 scale_factor = 512UL; /* Use fx23.9 */
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const u32 pix_scale = 1024*1024UL; /* Pix perf in [29:20] */
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const u32 world_scale = 1024UL; /* World performance in [19:10] */
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const u32 tpc_scale = 1; /* TPC balancing in [9:0] */
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u32 scg_num_pes = 0;
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u32 min_scg_gpc_pix_perf = scale_factor; /* Init perf as maximum */
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u32 average_tpcs = 0; /* Average of # of TPCs per GPC */
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u32 deviation; /* absolute diff between TPC# and average_tpcs, averaged across GPCs */
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u32 norm_tpc_deviation; /* deviation/max_tpc_per_gpc */
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u32 tpc_balance;
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u32 scg_gpc_pix_perf;
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u32 scg_world_perf;
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u32 gpc;
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u32 pes;
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int diff;
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bool tpc_removed_gpc = false;
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bool tpc_removed_pes = false;
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u32 max_tpc_gpc = 0;
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u32 num_tpc_mask;
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u32 *num_tpc_gpc;
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int ret = -EINVAL;
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if (!(num_tpc_gpc = kcalloc(gr->gpc_nr, sizeof(*num_tpc_gpc), GFP_KERNEL)))
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return -ENOMEM;
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/* Calculate pix-perf-reduction-rate per GPC and find bottleneck TPC */
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for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
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num_tpc_mask = gpc_tpc_mask[gpc];
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if ((gpc == disable_gpc) && num_tpc_mask & BIT(disable_tpc)) {
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/* Safety check if a TPC is removed twice */
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if (WARN_ON(tpc_removed_gpc))
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goto done;
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/* Remove logical TPC from set */
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num_tpc_mask &= ~BIT(disable_tpc);
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tpc_removed_gpc = true;
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}
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/* track balancing of tpcs across gpcs */
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num_tpc_gpc[gpc] = hweight32(num_tpc_mask);
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average_tpcs += num_tpc_gpc[gpc];
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/* save the maximum numer of gpcs */
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max_tpc_gpc = num_tpc_gpc[gpc] > max_tpc_gpc ? num_tpc_gpc[gpc] : max_tpc_gpc;
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/*
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* Calculate ratio between TPC count and post-FS and post-SCG
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*
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* ratio represents relative throughput of the GPC
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*/
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scg_gpc_pix_perf = scale_factor * num_tpc_gpc[gpc] / gr->tpc_nr[gpc];
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if (min_scg_gpc_pix_perf > scg_gpc_pix_perf)
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min_scg_gpc_pix_perf = scg_gpc_pix_perf;
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/* Calculate # of surviving PES */
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for (pes = 0; pes < gr->ppc_nr[gpc]; pes++) {
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/* Count the number of TPC on the set */
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num_tpc_mask = gr->ppc_tpc_mask[gpc][pes] & gpc_tpc_mask[gpc];
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if ((gpc == disable_gpc) && (num_tpc_mask & BIT(disable_tpc))) {
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if (WARN_ON(tpc_removed_pes))
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goto done;
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num_tpc_mask &= ~BIT(disable_tpc);
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tpc_removed_pes = true;
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}
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if (hweight32(num_tpc_mask))
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scg_num_pes++;
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}
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}
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if (WARN_ON(!tpc_removed_gpc || !tpc_removed_pes))
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goto done;
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if (max_tpc_gpc == 0) {
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*perf = 0;
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goto done_ok;
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}
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/* Now calculate perf */
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scg_world_perf = (scale_factor * scg_num_pes) / gr->ppc_total;
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deviation = 0;
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average_tpcs = scale_factor * average_tpcs / gr->gpc_nr;
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for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
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diff = average_tpcs - scale_factor * num_tpc_gpc[gpc];
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if (diff < 0)
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diff = -diff;
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deviation += diff;
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}
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deviation /= gr->gpc_nr;
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norm_tpc_deviation = deviation / max_tpc_gpc;
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tpc_balance = scale_factor - norm_tpc_deviation;
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if ((tpc_balance > scale_factor) ||
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(scg_world_perf > scale_factor) ||
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(min_scg_gpc_pix_perf > scale_factor) ||
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(norm_tpc_deviation > scale_factor)) {
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WARN_ON(1);
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goto done;
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}
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*perf = (pix_scale * min_scg_gpc_pix_perf) +
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(world_scale * scg_world_perf) +
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(tpc_scale * tpc_balance);
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done_ok:
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ret = 0;
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done:
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kfree(num_tpc_gpc);
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return ret;
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}
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int
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gv100_gr_oneinit_sm_id(struct gf100_gr *gr)
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{
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unsigned long *gpc_tpc_mask;
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u32 *tpc_table, *gpc_table;
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u32 gpc, tpc, pes, gtpc;
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int perf, maxperf, ret = 0;
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gpc_tpc_mask = kcalloc(gr->gpc_nr, sizeof(*gpc_tpc_mask), GFP_KERNEL);
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gpc_table = kcalloc(gr->tpc_total, sizeof(*gpc_table), GFP_KERNEL);
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tpc_table = kcalloc(gr->tpc_total, sizeof(*tpc_table), GFP_KERNEL);
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if (!gpc_table || !tpc_table || !gpc_tpc_mask) {
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ret = -ENOMEM;
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goto done;
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}
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for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
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for (pes = 0; pes < gr->ppc_nr[gpc]; pes++)
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gpc_tpc_mask[gpc] |= gr->ppc_tpc_mask[gpc][pes];
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}
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for (gtpc = 0; gtpc < gr->tpc_total; gtpc++) {
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for (maxperf = -1, gpc = 0; gpc < gr->gpc_nr; gpc++) {
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for_each_set_bit(tpc, &gpc_tpc_mask[gpc], gr->tpc_nr[gpc]) {
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ret = gv100_gr_scg_estimate_perf(gr, gpc_tpc_mask, gpc, tpc, &perf);
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if (ret)
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goto done;
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/* nvgpu does ">=" here, but this gets us RM's numbers. */
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if (perf > maxperf) {
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maxperf = perf;
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gpc_table[gtpc] = gpc;
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tpc_table[gtpc] = tpc;
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}
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}
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}
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gpc_tpc_mask[gpc_table[gtpc]] &= ~BIT(tpc_table[gtpc]);
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}
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/*TODO: build table for sm_per_tpc != 1, don't use yet, but might need later? */
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for (gtpc = 0; gtpc < gr->tpc_total; gtpc++) {
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gr->sm[gtpc].gpc = gpc_table[gtpc];
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gr->sm[gtpc].tpc = tpc_table[gtpc];
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gr->sm_nr++;
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}
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done:
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kfree(gpc_table);
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kfree(tpc_table);
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kfree(gpc_tpc_mask);
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return ret;
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}
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static const struct gf100_gr_func
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gv100_gr = {
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.oneinit_tiles = gm200_gr_oneinit_tiles,
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.oneinit_sm_id = gm200_gr_oneinit_sm_id,
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.oneinit_sm_id = gv100_gr_oneinit_sm_id,
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.init = gf100_gr_init,
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.init_419bd8 = gv100_gr_init_419bd8,
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.init_gpc_mmu = gm200_gr_init_gpc_mmu,
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@ -40,8 +40,9 @@ tu102_gr_init_fs(struct gf100_gr *gr)
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gk104_grctx_generate_gpc_tpc_nr(gr);
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for (sm = 0; sm < gr->sm_nr; sm++) {
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nvkm_wr32(device, GPC_UNIT(gr->sm[sm].gpc, 0x0c10 +
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gr->sm[sm].tpc * 4), sm);
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int tpc = gv100_gr_nonpes_aware_tpc(gr, gr->sm[sm].gpc, gr->sm[sm].tpc);
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nvkm_wr32(device, GPC_UNIT(gr->sm[sm].gpc, 0x0c10 + tpc * 4), sm);
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}
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gm200_grctx_generate_dist_skip_table(gr);
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@ -93,7 +94,7 @@ tu102_gr_init_gpc_mmu(struct gf100_gr *gr)
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static const struct gf100_gr_func
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tu102_gr = {
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.oneinit_tiles = gm200_gr_oneinit_tiles,
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.oneinit_sm_id = gm200_gr_oneinit_sm_id,
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.oneinit_sm_id = gv100_gr_oneinit_sm_id,
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.init = gf100_gr_init,
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.init_419bd8 = gv100_gr_init_419bd8,
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.init_gpc_mmu = tu102_gr_init_gpc_mmu,
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