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arm64: dts: qcom: sm8550: add cpu OPP table with DDR, LLCC & L3 bandwidths
Add the OPP tables for each CPU clusters (cpu0-1-2, cpu3-4-5-6 & cpu7) to permit scaling the Last Level Cache Controller (LLCC), DDR and L3 cache frequency by aggregating bandwidth requests of all CPU core with referenc to the current OPP they are configured in by the LMH/EPSS hardware. The effect is a proper caches & DDR frequency scaling when CPU cores changes frequency. The OPP tables were built using the downstream memlat ddr, llcc & l3 tables for each cluster types with the actual EPSS cpufreq LUT tables from running a QCS8550 device. Also add the OSC L3 Cache controller node. Also add the interconnect entry for each cpu, with 3 different paths: - CPU to Last Level Cache Controller (LLCC) - Last Level Cache Controller (LLCC) to DDR - L3 Cache from CPU to DDR interface Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Aaron Kling <webgeek1234@gmail.com> Link: https://lore.kernel.org/r/20260330-sm8550-ddr-bw-scaling-v4-1-5020c06983a0@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Aaron Kling
Bjorn Andersson
parent
9c633eec37
commit
3f5dcc05cd
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@ -17,6 +17,7 @@
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interconnect/qcom,icc.h>
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#include <dt-bindings/interconnect/qcom,sm8550-rpmh.h>
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#include <dt-bindings/interconnect/qcom,osm-l3.h>
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#include <dt-bindings/mailbox/qcom-ipcc.h>
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#include <dt-bindings/power/qcom-rpmpd.h>
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#include <dt-bindings/power/qcom,rpmhpd.h>
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@ -78,6 +79,13 @@ cpu0: cpu@0 {
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qcom,freq-domain = <&cpufreq_hw 0>;
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capacity-dmips-mhz = <326>;
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dynamic-power-coefficient = <251>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&epss_l3 MASTER_EPSS_L3_APPS
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&epss_l3 SLAVE_EPSS_L3_SHARED>;
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#cooling-cells = <2>;
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l2_0: l2-cache {
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compatible = "cache";
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@ -104,6 +112,13 @@ cpu1: cpu@100 {
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qcom,freq-domain = <&cpufreq_hw 0>;
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capacity-dmips-mhz = <326>;
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dynamic-power-coefficient = <251>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&epss_l3 MASTER_EPSS_L3_APPS
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&epss_l3 SLAVE_EPSS_L3_SHARED>;
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#cooling-cells = <2>;
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l2_100: l2-cache {
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compatible = "cache";
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@ -125,6 +140,13 @@ cpu2: cpu@200 {
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qcom,freq-domain = <&cpufreq_hw 0>;
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capacity-dmips-mhz = <326>;
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dynamic-power-coefficient = <251>;
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operating-points-v2 = <&cpu0_opp_table>;
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interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&epss_l3 MASTER_EPSS_L3_APPS
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&epss_l3 SLAVE_EPSS_L3_SHARED>;
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#cooling-cells = <2>;
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l2_200: l2-cache {
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compatible = "cache";
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@ -146,6 +168,13 @@ cpu3: cpu@300 {
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qcom,freq-domain = <&cpufreq_hw 1>;
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capacity-dmips-mhz = <693>;
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dynamic-power-coefficient = <447>;
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operating-points-v2 = <&cpu3_opp_table>;
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interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&epss_l3 MASTER_EPSS_L3_APPS
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&epss_l3 SLAVE_EPSS_L3_SHARED>;
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#cooling-cells = <2>;
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l2_300: l2-cache {
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compatible = "cache";
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@ -167,6 +196,13 @@ cpu4: cpu@400 {
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qcom,freq-domain = <&cpufreq_hw 1>;
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capacity-dmips-mhz = <693>;
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dynamic-power-coefficient = <447>;
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operating-points-v2 = <&cpu3_opp_table>;
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interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&epss_l3 MASTER_EPSS_L3_APPS
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&epss_l3 SLAVE_EPSS_L3_SHARED>;
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#cooling-cells = <2>;
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l2_400: l2-cache {
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compatible = "cache";
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@ -188,6 +224,13 @@ cpu5: cpu@500 {
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qcom,freq-domain = <&cpufreq_hw 1>;
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capacity-dmips-mhz = <693>;
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dynamic-power-coefficient = <447>;
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operating-points-v2 = <&cpu3_opp_table>;
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interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&epss_l3 MASTER_EPSS_L3_APPS
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&epss_l3 SLAVE_EPSS_L3_SHARED>;
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#cooling-cells = <2>;
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l2_500: l2-cache {
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compatible = "cache";
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@ -209,6 +252,13 @@ cpu6: cpu@600 {
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qcom,freq-domain = <&cpufreq_hw 1>;
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capacity-dmips-mhz = <693>;
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dynamic-power-coefficient = <447>;
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operating-points-v2 = <&cpu3_opp_table>;
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interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&epss_l3 MASTER_EPSS_L3_APPS
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&epss_l3 SLAVE_EPSS_L3_SHARED>;
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#cooling-cells = <2>;
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l2_600: l2-cache {
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compatible = "cache";
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@ -230,6 +280,13 @@ cpu7: cpu@700 {
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qcom,freq-domain = <&cpufreq_hw 2>;
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capacity-dmips-mhz = <1024>;
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dynamic-power-coefficient = <1057>;
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operating-points-v2 = <&cpu7_opp_table>;
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interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
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&gem_noc SLAVE_LLCC QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&mc_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
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<&epss_l3 MASTER_EPSS_L3_APPS
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&epss_l3 SLAVE_EPSS_L3_SHARED>;
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#cooling-cells = <2>;
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l2_700: l2-cache {
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compatible = "cache";
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@ -397,6 +454,306 @@ memory@a0000000 {
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reg = <0 0xa0000000 0 0>;
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};
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cpu0_opp_table: opp-table-cpu0 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-307200000 {
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opp-hz = /bits/ 64 <307200000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>;
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};
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opp-441600000 {
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opp-hz = /bits/ 64 <441600000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (384000 * 32)>;
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};
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opp-556800000 {
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opp-hz = /bits/ 64 <556800000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>;
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};
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opp-672000000 {
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opp-hz = /bits/ 64 <672000000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>;
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};
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opp-787200000 {
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opp-hz = /bits/ 64 <787200000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (729600 * 32)>;
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};
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opp-902400000 {
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opp-hz = /bits/ 64 <902400000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (844800 * 32)>;
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};
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opp-1017600000 {
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opp-hz = /bits/ 64 <1017600000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (940800 * 32)>;
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};
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opp-1113600000 {
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opp-hz = /bits/ 64 <1113600000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (1056000 * 32)>;
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};
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opp-1228800000 {
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opp-hz = /bits/ 64 <1228800000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (1152000 * 32)>;
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};
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opp-1344000000 {
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opp-hz = /bits/ 64 <1344000000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (1267200 * 32)>;
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};
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opp-1459200000 {
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opp-hz = /bits/ 64 <1459200000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (1267200 * 32)>;
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};
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opp-1555200000 {
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opp-hz = /bits/ 64 <1555200000>;
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opp-peak-kBps = <(466000 * 16) (768000 * 4) (1478400 * 32)>;
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};
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opp-1670400000 {
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opp-hz = /bits/ 64 <1670400000>;
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opp-peak-kBps = <(466000 * 16) (768000 * 4) (1478400 * 32)>;
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};
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opp-1785600000 {
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opp-hz = /bits/ 64 <1785600000>;
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opp-peak-kBps = <(466000 * 16) (768000 * 4) (1478400 * 32)>;
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};
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opp-1900800000 {
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opp-hz = /bits/ 64 <1900800000>;
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opp-peak-kBps = <(466000 * 16) (768000 * 4) (1689600 * 32)>;
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};
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opp-2016000000 {
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opp-hz = /bits/ 64 <2016000000>;
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opp-peak-kBps = <(600000 * 16) (1555000 * 4) (1804800 * 32)>;
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};
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};
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cpu3_opp_table: opp-table-cpu3 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-499200000 {
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opp-hz = /bits/ 64 <499200000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>;
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};
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opp-614400000 {
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opp-hz = /bits/ 64 <614400000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>;
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};
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opp-729600000 {
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opp-hz = /bits/ 64 <729600000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>;
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};
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opp-844800000 {
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opp-hz = /bits/ 64 <844800000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>;
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};
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opp-940800000 {
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opp-hz = /bits/ 64 <940800000>;
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opp-peak-kBps = <(300000 * 16) (768000 * 4) (729600 * 32)>;
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};
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opp-1056000000 {
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opp-hz = /bits/ 64 <1056000000>;
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opp-peak-kBps = <(300000 * 16) (768000 * 4) (729600 * 32)>;
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};
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opp-1171200000 {
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opp-hz = /bits/ 64 <1171200000>;
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opp-peak-kBps = <(466000 * 16) (1555000 * 4) (940800 * 32)>;
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};
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opp-1286400000 {
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opp-hz = /bits/ 64 <1286400000>;
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opp-peak-kBps = <(466000 * 16) (1555000 * 4) (940800 * 32)>;
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};
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opp-1401600000 {
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opp-hz = /bits/ 64 <1401600000>;
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opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1056000 * 32)>;
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};
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opp-1536000000 {
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opp-hz = /bits/ 64 <1536000000>;
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opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1056000 * 32)>;
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};
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opp-1651200000 {
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opp-hz = /bits/ 64 <1651200000>;
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opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1267200 * 32)>;
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};
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opp-1785600000 {
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opp-hz = /bits/ 64 <1785600000>;
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opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1267200 * 32)>;
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};
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opp-1920000000 {
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opp-hz = /bits/ 64 <1920000000>;
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opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1267200 * 32)>;
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};
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opp-2054400000 {
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opp-hz = /bits/ 64 <2054400000>;
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opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
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};
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opp-2188800000 {
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opp-hz = /bits/ 64 <2188800000>;
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opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
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};
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opp-2323200000 {
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opp-hz = /bits/ 64 <2323200000>;
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opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
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};
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opp-2457600000 {
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opp-hz = /bits/ 64 <2457600000>;
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opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
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};
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opp-2592000000 {
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opp-hz = /bits/ 64 <2592000000>;
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opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
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};
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opp-2707200000 {
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opp-hz = /bits/ 64 <2707200000>;
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opp-peak-kBps = <(933000 * 16) (2736000 * 4) (1478400 * 32)>;
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};
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opp-2803200000 {
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opp-hz = /bits/ 64 <2803200000>;
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opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1689600 * 32)>;
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};
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};
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cpu7_opp_table: opp-table-cpu7 {
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compatible = "operating-points-v2";
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opp-shared;
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opp-595200000 {
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opp-hz = /bits/ 64 <595200000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (307200 * 32)>;
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};
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opp-729600000 {
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opp-hz = /bits/ 64 <729600000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>;
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};
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opp-864000000 {
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opp-hz = /bits/ 64 <864000000>;
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opp-peak-kBps = <(300000 * 16) (547000 * 4) (499200 * 32)>;
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};
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opp-998400000 {
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opp-hz = /bits/ 64 <998400000>;
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opp-peak-kBps = <(300000 * 16) (768000 * 4) (729600 * 32)>;
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};
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opp-1132800000 {
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opp-hz = /bits/ 64 <1132800000>;
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opp-peak-kBps = <(300000 * 16) (768000 * 4) (729600 * 32)>;
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};
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opp-1248000000 {
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opp-hz = /bits/ 64 <1248000000>;
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opp-peak-kBps = <(466000 * 16) (1555000 * 4) (940800 * 32)>;
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};
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opp-1363200000 {
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opp-hz = /bits/ 64 <1363200000>;
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opp-peak-kBps = <(466000 * 16) (1555000 * 4) (940800 * 32)>;
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};
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opp-1478400000 {
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opp-hz = /bits/ 64 <1478400000>;
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opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1056000 * 32)>;
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};
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opp-1593600000 {
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opp-hz = /bits/ 64 <1593600000>;
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opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1056000 * 32)>;
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};
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opp-1708800000 {
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opp-hz = /bits/ 64 <1708800000>;
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opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1267200 * 32)>;
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};
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opp-1843200000 {
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opp-hz = /bits/ 64 <1843200000>;
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opp-peak-kBps = <(600000 * 16) (1708000 * 4) (1267200 * 32)>;
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};
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|
||||
opp-1977600000 {
|
||||
opp-hz = /bits/ 64 <1977600000>;
|
||||
opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1267200 * 32)>;
|
||||
};
|
||||
|
||||
opp-2092800000 {
|
||||
opp-hz = /bits/ 64 <2092800000>;
|
||||
opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
|
||||
};
|
||||
|
||||
opp-2227200000 {
|
||||
opp-hz = /bits/ 64 <2227200000>;
|
||||
opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
|
||||
};
|
||||
|
||||
opp-2342400000 {
|
||||
opp-hz = /bits/ 64 <2342400000>;
|
||||
opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
|
||||
};
|
||||
|
||||
opp-2476800000 {
|
||||
opp-hz = /bits/ 64 <2476800000>;
|
||||
opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
|
||||
};
|
||||
|
||||
opp-2592000000 {
|
||||
opp-hz = /bits/ 64 <2592000000>;
|
||||
opp-peak-kBps = <(806000 * 16) (2736000 * 4) (1478400 * 32)>;
|
||||
};
|
||||
|
||||
opp-2726400000 {
|
||||
opp-hz = /bits/ 64 <2726400000>;
|
||||
opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1478400 * 32)>;
|
||||
};
|
||||
|
||||
opp-2841600000 {
|
||||
opp-hz = /bits/ 64 <2841600000>;
|
||||
opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1689600 * 32)>;
|
||||
};
|
||||
|
||||
opp-2956800000 {
|
||||
opp-hz = /bits/ 64 <2956800000>;
|
||||
opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1689600 * 32)>;
|
||||
};
|
||||
|
||||
opp-3187200000 {
|
||||
opp-hz = /bits/ 64 <3187200000>;
|
||||
opp-peak-kBps = <(933000 * 16) (3686000 * 4) (1689600 * 32)>;
|
||||
};
|
||||
};
|
||||
|
||||
pmu-a510 {
|
||||
compatible = "arm,cortex-a510-pmu";
|
||||
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW &ppi_cluster0>;
|
||||
|
|
@ -5482,6 +5839,16 @@ rpmhpd_opp_turbo_l1: opp-416 {
|
|||
};
|
||||
};
|
||||
|
||||
epss_l3: interconnect@17d90000 {
|
||||
compatible = "qcom,sm8550-epss-l3", "qcom,epss-l3";
|
||||
reg = <0 0x17d90000 0 0x1000>;
|
||||
|
||||
clocks = <&bi_tcxo_div2>, <&gcc GCC_GPLL0>;
|
||||
clock-names = "xo", "alternate";
|
||||
|
||||
#interconnect-cells = <1>;
|
||||
};
|
||||
|
||||
cpufreq_hw: cpufreq@17d91000 {
|
||||
compatible = "qcom,sm8550-cpufreq-epss", "qcom,cpufreq-epss";
|
||||
reg = <0 0x17d91000 0 0x1000>,
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user