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drm/nouveau: tegra: Explicitly specify PMC instance to use

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Currently the kernel relies on a global variable to reference the PMC
context. Use an explicit lookup for the PMC and pass that to the public
PMC APIs.

Acked-by: Danilo Krummrich <dakr@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2025-02-03 16:27:02 +01:00
parent 64e609f929
commit 3ef27f1ad5
2 changed files with 10 additions and 1 deletions
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2
drivers/gpu/drm/nouveau/include/nvkm/core/tegra.h
View File

@ -18,6 +18,8 @@ struct nvkm_device_tegra {
struct regulator *vdd;
struct tegra_pmc *pmc;
struct {
/*
* Protects accesses to mm from subsystems

9
drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c
View File

@ -54,7 +54,8 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
reset_control_assert(tdev->rst);
udelay(10);
ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
ret = tegra_pmc_powergate_remove_clamping(tdev->pmc,
TEGRA_POWERGATE_3D);
if (ret)
goto err_clamp;
udelay(10);
@ -307,6 +308,12 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
goto free;
}
tdev->pmc = devm_tegra_pmc_get(&pdev->dev);
if (IS_ERR(tdev->pmc)) {
ret = PTR_ERR(tdev->pmc);
goto free;
}
/**
* The IOMMU bit defines the upper limit of the GPU-addressable space.
*/