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arm64: dts: freescale: Add dual-channel LVDS overlay for TQMa8MPxS

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This adds an overlay for the supported LVDS display AUO G133HAN01.
Configure the video PLL frequency to exactly match typical pixel clock of
141.200 MHz.

Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Alexander Stein 2026-06-25 07:14:47 +02:00 committed by Frank Li
parent 0d8c74f493
commit 3ee55e19db
2 changed files with 83 additions and 0 deletions
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2
arch/arm64/boot/dts/freescale/Makefile
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@ -502,8 +502,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314-imx219.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314-lvds-tm070jvhg33.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mp-ras314-lvds-tm070jvhg33-imx219.dtb
imx8mp-tqma8mpqs-mb-smarc-2-lvds-g133han01-dtbs += imx8mp-tqma8mpqs-mb-smarc-2.dtb imx8mp-tqma8mpqs-mb-smarc-2-lvds-g133han01.dtbo
imx8mp-tqma8mpqs-mb-smarc-2-lvds0-tm070jvhg33-dtbs += imx8mp-tqma8mpqs-mb-smarc-2.dtb imx8mp-tqma8mpqs-mb-smarc-2-lvds0-tm070jvhg33.dtbo
imx8mp-tqma8mpqs-mb-smarc-2-lvds1-tm070jvhg33-dtbs += imx8mp-tqma8mpqs-mb-smarc-2.dtb imx8mp-tqma8mpqs-mb-smarc-2-lvds1-tm070jvhg33.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpqs-mb-smarc-2-lvds-g133han01.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpqs-mb-smarc-2-lvds0-tm070jvhg33.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpqs-mb-smarc-2-lvds1-tm070jvhg33.dtb

81
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpqs-mb-smarc-2-lvds-g133han01.dtso Normal file
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@ -0,0 +1,81 @@
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright (c) 2025-2026 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Martin Schmiedel
*/
/dts-v1/;
/plugin/;
&backlight_lvds0 {
status = "okay";
};
&panel_lvds0 {
compatible = "auo,g133han01";
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-odd-pixels;
panel_in_lvds0: endpoint {
remote-endpoint = <&ldb_lvds_ch0>;
};
};
port@1 {
reg = <1>;
dual-lvds-even-pixels;
panel_in_lvds1: endpoint {
remote-endpoint = <&ldb_lvds_ch1>;
};
};
};
};
&lcdif2 {
status = "okay";
};
&lvds_bridge {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
ldb_lvds_ch0: endpoint {
remote-endpoint = <&panel_in_lvds0>;
};
};
port@2 {
reg = <2>;
ldb_lvds_ch1: endpoint {
remote-endpoint = <&panel_in_lvds1>;
};
};
};
};
// Update VIDEO_PLL1 frequency
&media_blk_ctrl {
assigned-clock-rates = <500000000>, <200000000>,
<0>, <0>, <500000000>,
<988400000>;
};
&pwm3 {
status = "okay";
};