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drm/rockchip: add RGA driver support
Rockchip RGA is a separate 2D raster graphic acceleration unit. It accelerates 2D graphics operations, such as point/line drawing, image scaling, rotation, BitBLT, alpha blending and image blur/sharpness. Change-Id: I9be8d683ea04802affb973b8b1ada646afe411d7 Signed-off-by: Yakir Yang <ykk@rock-chips.com>
This commit is contained in:
Yakir Yang
Huang, Tao
parent
bb88c2a1c5
commit
3e2bb4ee5b
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@ -16,6 +16,15 @@ config DRM_ROCKCHIP
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2D or 3D acceleration; acceleration is performed by other
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IP found on the SoC.
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config ROCKCHIP_DRM_RGA
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tristate "Rockchip RGA support"
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depends on DRM_ROCKCHIP
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help
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Choose this option to enable support for Rockchip RGA.
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Rockchip RGA is a kind of hardware 2D accelerator, and it support
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solid roration, scaling, color format transform, say Y to enable its
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driver
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config ROCKCHIP_DW_HDMI
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tristate "Rockchip specific extensions for Synopsys DW HDMI"
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depends on DRM_ROCKCHIP
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@ -6,6 +6,7 @@ rockchipdrm-y := rockchip_drm_drv.o rockchip_drm_fb.o \
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rockchip_drm_gem.o rockchip_drm_vop.o
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rockchipdrm-$(CONFIG_DRM_FBDEV_EMULATION) += rockchip_drm_fbdev.o
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obj-$(CONFIG_ROCKCHIP_DRM_RGA) += rockchip_drm_rga.o
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obj-$(CONFIG_ROCKCHIP_DW_HDMI) += dw_hdmi-rockchip.o
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obj-$(CONFIG_ROCKCHIP_DW_MIPI_DSI) += dw-mipi-dsi.o
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obj-$(CONFIG_ROCKCHIP_ANALOGIX_DP) += analogix_dp-rockchip.o
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@ -20,6 +20,7 @@
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_sync_helper.h>
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#include <drm/rockchip_drm.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm_runtime.h>
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#include <linux/module.h>
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@ -27,12 +28,11 @@
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#include <linux/component.h>
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#include <linux/fence.h>
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#include <drm/rockchip_drm.h>
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#include "rockchip_drm_drv.h"
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#include "rockchip_drm_fb.h"
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#include "rockchip_drm_fbdev.h"
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#include "rockchip_drm_gem.h"
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#include "rockchip_drm_rga.h"
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#define DRIVER_NAME "rockchip"
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#define DRIVER_DESC "RockChip Soc DRM"
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@ -426,6 +426,13 @@ static const struct drm_ioctl_desc rockchip_ioctls[] = {
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DRM_IOCTL_DEF_DRV(ROCKCHIP_GEM_CPU_RELEASE,
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rockchip_gem_cpu_release_ioctl,
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DRM_UNLOCKED | DRM_AUTH),
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DRM_IOCTL_DEF_DRV(ROCKCHIP_RGA_GET_VER, rockchip_rga_get_ver_ioctl,
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DRM_AUTH | DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(ROCKCHIP_RGA_SET_CMDLIST,
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rockchip_rga_set_cmdlist_ioctl,
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DRM_AUTH | DRM_RENDER_ALLOW),
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DRM_IOCTL_DEF_DRV(ROCKCHIP_RGA_EXEC, rockchip_rga_exec_ioctl,
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DRM_AUTH | DRM_RENDER_ALLOW),
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};
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static const struct file_operations rockchip_drm_driver_fops = {
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@ -68,6 +68,7 @@ struct rockchip_atomic_commit {
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*/
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struct rockchip_drm_file_private {
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struct list_head gem_cpu_acquire_list;
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struct rockchip_drm_rga_private *rga_priv;
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};
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/*
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963
drivers/gpu/drm/rockchip/rockchip_drm_rga.c
Normal file
963
drivers/gpu/drm/rockchip/rockchip_drm_rga.c
Normal file
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@ -0,0 +1,963 @@
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/delay.h>
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#include <linux/dma-buf.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/reset.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include <asm/cacheflush.h>
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#include <drm/drmP.h>
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#include <drm/rockchip_drm.h>
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#include "rockchip_drm_drv.h"
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#include "rockchip_drm_rga.h"
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#define RGA_MODE_BASE_REG 0x0100
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#define RGA_MODE_MAX_REG 0x017C
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#define RGA_SYS_CTRL 0x0000
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#define RGA_CMD_CTRL 0x0004
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#define RGA_CMD_BASE 0x0008
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#define RGA_INT 0x0010
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#define RGA_MMU_CTRL0 0x0014
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#define RGA_VERSION_INFO 0x0028
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#define RGA_SRC_Y_RGB_BASE_ADDR 0x0108
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#define RGA_SRC_CB_BASE_ADDR 0x010C
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#define RGA_SRC_CR_BASE_ADDR 0x0110
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#define RGA_SRC1_RGB_BASE_ADDR 0x0114
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#define RGA_DST_Y_RGB_BASE_ADDR 0x013C
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#define RGA_DST_CB_BASE_ADDR 0x0140
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#define RGA_DST_CR_BASE_ADDR 0x014C
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#define RGA_MMU_CTRL1 0x016C
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#define RGA_MMU_SRC_BASE 0x0170
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#define RGA_MMU_SRC1_BASE 0x0174
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#define RGA_MMU_DST_BASE 0x0178
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static void rga_dma_flush_range(void *ptr, int size)
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{
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#ifdef CONFIG_ARM
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dmac_flush_range(ptr, ptr + size);
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outer_flush_range(virt_to_phys(ptr), virt_to_phys(ptr + size));
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#elif CONFIG_ARM64
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__dma_flush_range(ptr, ptr + size);
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#endif
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}
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static inline void rga_write(struct rockchip_rga *rga, u32 reg, u32 value)
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{
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writel(value, rga->regs + reg);
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}
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static inline u32 rga_read(struct rockchip_rga *rga, u32 reg)
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{
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return readl(rga->regs + reg);
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}
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static inline void rga_mod(struct rockchip_rga *rga, u32 reg, u32 val, u32 mask)
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{
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u32 temp = rga_read(rga, reg) & ~(mask);
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temp |= val & mask;
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rga_write(rga, reg, temp);
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}
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static int rga_enable_clocks(struct rockchip_rga *rga)
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{
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int ret;
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ret = clk_prepare_enable(rga->sclk);
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if (ret) {
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dev_err(rga->dev, "Cannot enable rga sclk: %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(rga->aclk);
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if (ret) {
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dev_err(rga->dev, "Cannot enable rga aclk: %d\n", ret);
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goto err_disable_sclk;
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}
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ret = clk_prepare_enable(rga->hclk);
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if (ret) {
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dev_err(rga->dev, "Cannot enable rga hclk: %d\n", ret);
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goto err_disable_aclk;
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}
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return 0;
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err_disable_sclk:
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clk_disable_unprepare(rga->sclk);
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err_disable_aclk:
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clk_disable_unprepare(rga->aclk);
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return ret;
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}
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static void rga_disable_clocks(struct rockchip_rga *rga)
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{
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clk_disable_unprepare(rga->sclk);
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clk_disable_unprepare(rga->hclk);
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clk_disable_unprepare(rga->aclk);
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}
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static void rga_init_cmdlist(struct rockchip_rga *rga)
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{
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struct rga_cmdlist_node *node;
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int nr;
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node = rga->cmdlist_node;
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for (nr = 0; nr < ARRAY_SIZE(rga->cmdlist_node); nr++)
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list_add_tail(&node[nr].list, &rga->free_cmdlist);
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}
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static int rga_alloc_dma_buf_for_cmdlist(struct rga_runqueue_node *runqueue)
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{
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struct list_head *run_cmdlist = &runqueue->run_cmdlist;
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struct device *dev = runqueue->dev;
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struct dma_attrs cmdlist_dma_attrs;
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struct rga_cmdlist_node *node;
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void *cmdlist_pool_virt;
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dma_addr_t cmdlist_pool;
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int cmdlist_cnt = 0;
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int count = 0;
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list_for_each_entry(node, run_cmdlist, list)
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cmdlist_cnt++;
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init_dma_attrs(&cmdlist_dma_attrs);
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dma_set_attr(DMA_ATTR_WRITE_COMBINE, &runqueue->cmdlist_dma_attrs);
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cmdlist_pool_virt = dma_alloc_attrs(dev, cmdlist_cnt * RGA_CMDLIST_SIZE,
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&cmdlist_pool, GFP_KERNEL,
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&cmdlist_dma_attrs);
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if (!cmdlist_pool_virt) {
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dev_err(dev, "failed to allocate cmdlist dma memory\n");
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return -ENOMEM;
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}
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/*
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* Fill in the RGA operation registers from cmdlist command buffer,
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* and also filled in the MMU TLB base information.
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*/
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list_for_each_entry(node, run_cmdlist, list) {
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struct rga_cmdlist *cmdlist = &node->cmdlist;
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unsigned int mmu_ctrl = 0;
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unsigned int reg;
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u32 *dest;
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int i;
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dest = cmdlist_pool_virt + RGA_CMDLIST_SIZE * 4 * count++;
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for (i = 0; i < cmdlist->last / 2; i++) {
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reg = (node->cmdlist.data[2 * i] - RGA_MODE_BASE_REG);
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if (reg > RGA_MODE_BASE_REG)
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continue;
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dest[reg >> 2] = cmdlist->data[2 * i + 1];
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}
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if (cmdlist->src_mmu_pages) {
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reg = RGA_MMU_SRC_BASE - RGA_MODE_BASE_REG;
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dest[reg >> 2] = virt_to_phys(cmdlist->src_mmu_pages) >> 4;
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mmu_ctrl |= 0x7;
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}
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if (cmdlist->dst_mmu_pages) {
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reg = RGA_MMU_DST_BASE - RGA_MODE_BASE_REG;
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dest[reg >> 2] = virt_to_phys(cmdlist->dst_mmu_pages) >> 4;
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mmu_ctrl |= 0x7 << 8;
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}
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if (cmdlist->src1_mmu_pages) {
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reg = RGA_MMU_SRC1_BASE - RGA_MODE_BASE_REG;
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dest[reg >> 2] = virt_to_phys(cmdlist->src1_mmu_pages) >> 4;
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mmu_ctrl |= 0x7 << 4;
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}
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reg = RGA_MMU_CTRL1 - RGA_MODE_BASE_REG;
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dest[reg >> 2] = mmu_ctrl;
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}
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rga_dma_flush_range(cmdlist_pool_virt, cmdlist_cnt * RGA_CMDLIST_SIZE);
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runqueue->cmdlist_dma_attrs = cmdlist_dma_attrs;
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runqueue->cmdlist_pool_virt = cmdlist_pool_virt;
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runqueue->cmdlist_pool = cmdlist_pool;
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runqueue->cmdlist_cnt = cmdlist_cnt;
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return 0;
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}
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static int rga_check_reg_offset(struct device *dev,
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struct rga_cmdlist_node *node)
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{
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struct rga_cmdlist *cmdlist = &node->cmdlist;
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int index;
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int reg;
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int i;
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for (i = 0; i < cmdlist->last / 2; i++) {
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index = cmdlist->last - 2 * (i + 1);
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reg = cmdlist->data[index];
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switch (reg) {
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case RGA_BUF_TYPE_GEMFD | RGA_DST_Y_RGB_BASE_ADDR:
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case RGA_BUF_TYPE_GEMFD | RGA_SRC_Y_RGB_BASE_ADDR:
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break;
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case RGA_BUF_TYPE_USERPTR | RGA_DST_Y_RGB_BASE_ADDR:
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case RGA_BUF_TYPE_USERPTR | RGA_SRC_Y_RGB_BASE_ADDR:
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goto err;
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default:
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if (reg < RGA_MODE_BASE_REG || reg > RGA_MODE_MAX_REG)
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goto err;
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if (reg % 4)
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goto err;
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}
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}
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return 0;
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err:
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dev_err(dev, "Bad register offset: 0x%x\n", cmdlist->data[index]);
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return -EINVAL;
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}
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static struct dma_buf_attachment *
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rga_gem_buf_to_pages(struct rockchip_rga *rga, void **mmu_pages, int fd)
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{
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struct dma_buf_attachment *attach;
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struct dma_buf *dmabuf;
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struct sg_table *sgt;
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struct scatterlist *sgl;
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unsigned int mapped_size = 0;
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unsigned int address;
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unsigned int len;
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unsigned int i, p;
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unsigned int *pages;
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int ret;
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dmabuf = dma_buf_get(fd);
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if (IS_ERR(dmabuf)) {
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dev_err(rga->dev, "Failed to get dma_buf with fd %d\n", fd);
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return ERR_PTR(-EINVAL);
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}
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attach = dma_buf_attach(dmabuf, rga->dev);
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if (IS_ERR(attach)) {
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dev_err(rga->dev, "Failed to attach dma_buf\n");
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ret = PTR_ERR(attach);
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goto failed_attach;
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}
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sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
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if (IS_ERR(sgt)) {
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dev_err(rga->dev, "Failed to map dma_buf attachment\n");
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ret = PTR_ERR(sgt);
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goto failed_detach;
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}
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/*
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* Alloc (2^3 * 4K) = 32K byte for storing pages, those space could
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* cover 32K * 4K = 128M ram address.
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*/
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pages = (unsigned int *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, 3);
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for_each_sg(sgt->sgl, sgl, sgt->nents, i) {
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len = sg_dma_len(sgl) >> PAGE_SHIFT;
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address = sg_phys(sgl);
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for (p = 0; p < len; p++) {
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dma_addr_t phys = address + (p << PAGE_SHIFT);
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void *virt = phys_to_virt(phys);
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rga_dma_flush_range(virt, 4 * 1024);
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pages[mapped_size + p] = phys;
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}
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mapped_size += len;
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}
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rga_dma_flush_range(pages, 32 * 1024);
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*mmu_pages = pages;
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dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
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return attach;
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failed_detach:
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dma_buf_detach(dmabuf, attach);
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failed_attach:
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dma_buf_put(dmabuf);
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return ERR_PTR(ret);
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}
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static int rga_map_cmdlist_gem(struct rockchip_rga *rga,
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struct rga_cmdlist_node *node,
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struct drm_device *drm_dev,
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struct drm_file *file)
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{
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struct rga_cmdlist *cmdlist = &node->cmdlist;
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struct dma_buf_attachment *attach;
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void *mmu_pages;
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int fd;
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int i;
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for (i = 0; i < cmdlist->last / 2; i++) {
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int index = cmdlist->last - 2 * (i + 1);
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switch (cmdlist->data[index]) {
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case RGA_SRC_Y_RGB_BASE_ADDR | RGA_BUF_TYPE_GEMFD:
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fd = cmdlist->data[index + 1];
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attach = rga_gem_buf_to_pages(rga, &mmu_pages, fd);
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cmdlist->src_attach = attach;
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cmdlist->src_mmu_pages = mmu_pages;
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break;
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case RGA_DST_Y_RGB_BASE_ADDR | RGA_BUF_TYPE_GEMFD:
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fd = cmdlist->data[index + 1];
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attach = rga_gem_buf_to_pages(rga, &mmu_pages, fd);
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cmdlist->dst_attach = attach;
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cmdlist->dst_mmu_pages = mmu_pages;
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break;
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}
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}
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return 0;
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}
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static void rga_unmap_cmdlist_gem(struct rockchip_rga *rga,
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struct rga_cmdlist_node *node)
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{
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struct dma_buf_attachment *attach;
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struct dma_buf *dma_buf;
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attach = node->cmdlist.src_attach;
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if (attach) {
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dma_buf = attach->dmabuf;
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dma_buf_detach(dma_buf, attach);
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dma_buf_put(dma_buf);
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}
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node->cmdlist.src_attach = NULL;
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attach = node->cmdlist.dst_attach;
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if (attach) {
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dma_buf = attach->dmabuf;
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dma_buf_detach(dma_buf, attach);
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dma_buf_put(dma_buf);
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}
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node->cmdlist.dst_attach = NULL;
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if (node->cmdlist.src_mmu_pages)
|
||||
free_pages((unsigned long)node->cmdlist.src_mmu_pages, 3);
|
||||
node->cmdlist.src_mmu_pages = NULL;
|
||||
|
||||
if (node->cmdlist.src1_mmu_pages)
|
||||
free_pages((unsigned long)node->cmdlist.src1_mmu_pages, 3);
|
||||
node->cmdlist.src1_mmu_pages = NULL;
|
||||
|
||||
if (node->cmdlist.dst_mmu_pages)
|
||||
free_pages((unsigned long)node->cmdlist.dst_mmu_pages, 3);
|
||||
node->cmdlist.dst_mmu_pages = NULL;
|
||||
}
|
||||
|
||||
static void rga_cmd_start(struct rockchip_rga *rga,
|
||||
struct rga_runqueue_node *runqueue)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = pm_runtime_get_sync(rga->dev);
|
||||
if (ret < 0)
|
||||
return;
|
||||
|
||||
rga_write(rga, RGA_SYS_CTRL, 0x00);
|
||||
|
||||
rga_write(rga, RGA_CMD_BASE, runqueue->cmdlist_pool);
|
||||
|
||||
rga_write(rga, RGA_SYS_CTRL, 0x22);
|
||||
|
||||
rga_write(rga, RGA_INT, 0x600);
|
||||
|
||||
rga_write(rga, RGA_CMD_CTRL, ((runqueue->cmdlist_cnt - 1) << 3) | 0x1);
|
||||
}
|
||||
|
||||
static void rga_free_runqueue_node(struct rockchip_rga *rga,
|
||||
struct rga_runqueue_node *runqueue)
|
||||
{
|
||||
struct rga_cmdlist_node *node;
|
||||
|
||||
if (!runqueue)
|
||||
return;
|
||||
|
||||
if (runqueue->cmdlist_pool_virt && runqueue->cmdlist_pool)
|
||||
dma_free_attrs(rga->dev, runqueue->cmdlist_cnt * RGA_CMDLIST_SIZE,
|
||||
runqueue->cmdlist_pool_virt,
|
||||
runqueue->cmdlist_pool,
|
||||
&runqueue->cmdlist_dma_attrs);
|
||||
|
||||
mutex_lock(&rga->cmdlist_mutex);
|
||||
/*
|
||||
* commands in run_cmdlist have been completed so unmap all gem
|
||||
* objects in each command node so that they are unreferenced.
|
||||
*/
|
||||
list_for_each_entry(node, &runqueue->run_cmdlist, list)
|
||||
rga_unmap_cmdlist_gem(rga, node);
|
||||
list_splice_tail_init(&runqueue->run_cmdlist, &rga->free_cmdlist);
|
||||
mutex_unlock(&rga->cmdlist_mutex);
|
||||
|
||||
kmem_cache_free(rga->runqueue_slab, runqueue);
|
||||
}
|
||||
|
||||
static struct rga_runqueue_node *rga_get_runqueue(struct rockchip_rga *rga)
|
||||
{
|
||||
struct rga_runqueue_node *runqueue;
|
||||
|
||||
if (list_empty(&rga->runqueue_list))
|
||||
return NULL;
|
||||
|
||||
runqueue = list_first_entry(&rga->runqueue_list,
|
||||
struct rga_runqueue_node, list);
|
||||
list_del_init(&runqueue->list);
|
||||
|
||||
return runqueue;
|
||||
}
|
||||
|
||||
static void rga_exec_runqueue(struct rockchip_rga *rga)
|
||||
{
|
||||
rga->runqueue_node = rga_get_runqueue(rga);
|
||||
if (rga->runqueue_node)
|
||||
rga_cmd_start(rga, rga->runqueue_node);
|
||||
}
|
||||
|
||||
static struct rga_cmdlist_node *rga_get_cmdlist(struct rockchip_rga *rga)
|
||||
{
|
||||
struct rga_cmdlist_node *node;
|
||||
struct device *dev = rga->dev;
|
||||
|
||||
mutex_lock(&rga->cmdlist_mutex);
|
||||
if (list_empty(&rga->free_cmdlist)) {
|
||||
dev_err(dev, "there is no free cmdlist\n");
|
||||
mutex_unlock(&rga->cmdlist_mutex);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
node = list_first_entry(&rga->free_cmdlist,
|
||||
struct rga_cmdlist_node, list);
|
||||
list_del_init(&node->list);
|
||||
mutex_unlock(&rga->cmdlist_mutex);
|
||||
|
||||
return node;
|
||||
}
|
||||
|
||||
static void rga_add_cmdlist_to_inuse(struct rockchip_drm_rga_private *rga_priv,
|
||||
struct rga_cmdlist_node *node)
|
||||
{
|
||||
struct rga_cmdlist_node *lnode;
|
||||
|
||||
if (list_empty(&rga_priv->inuse_cmdlist))
|
||||
goto add_to_list;
|
||||
|
||||
/* this links to base address of new cmdlist */
|
||||
lnode = list_entry(rga_priv->inuse_cmdlist.prev,
|
||||
struct rga_cmdlist_node, list);
|
||||
|
||||
add_to_list:
|
||||
list_add_tail(&node->list, &rga_priv->inuse_cmdlist);
|
||||
}
|
||||
|
||||
/*
|
||||
* IOCRL functions for userspace to get RGA version.
|
||||
*/
|
||||
int rockchip_rga_get_ver_ioctl(struct drm_device *drm_dev, void *data,
|
||||
struct drm_file *file)
|
||||
{
|
||||
struct rockchip_drm_file_private *file_priv = file->driver_priv;
|
||||
struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
|
||||
struct drm_rockchip_rga_get_ver *ver = data;
|
||||
struct rockchip_rga *rga;
|
||||
struct device *dev;
|
||||
|
||||
if (!rga_priv)
|
||||
return -ENODEV;
|
||||
|
||||
dev = rga_priv->dev;
|
||||
if (!dev)
|
||||
return -ENODEV;
|
||||
|
||||
rga = dev_get_drvdata(dev);
|
||||
if (!rga)
|
||||
return -EFAULT;
|
||||
|
||||
ver->major = rga->version.major;
|
||||
ver->minor = rga->version.minor;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* IOCRL functions for userspace to send an RGA request.
|
||||
*/
|
||||
int rockchip_rga_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
|
||||
struct drm_file *file)
|
||||
{
|
||||
struct rockchip_drm_file_private *file_priv = file->driver_priv;
|
||||
struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
|
||||
struct drm_rockchip_rga_set_cmdlist *req = data;
|
||||
struct rga_cmdlist_node *node;
|
||||
struct rga_cmdlist *cmdlist;
|
||||
struct rockchip_rga *rga;
|
||||
int ret;
|
||||
|
||||
if (!rga_priv)
|
||||
return -ENODEV;
|
||||
|
||||
if (!rga_priv->dev)
|
||||
return -ENODEV;
|
||||
|
||||
rga = dev_get_drvdata(rga_priv->dev);
|
||||
if (!rga)
|
||||
return -EFAULT;
|
||||
|
||||
node = rga_get_cmdlist(rga);
|
||||
if (!node)
|
||||
return -ENOMEM;
|
||||
|
||||
cmdlist = &node->cmdlist;
|
||||
cmdlist->last = 0;
|
||||
|
||||
if (req->cmd_nr > RGA_CMDLIST_SIZE || req->cmd_buf_nr > RGA_CMDBUF_SIZE) {
|
||||
dev_err(rga->dev, "cmdlist size is too big\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/*
|
||||
* Copy the command / buffer registers setting from userspace, each
|
||||
* command have two integer, one for register offset, another for
|
||||
* register value.
|
||||
*/
|
||||
if (copy_from_user(cmdlist->data, compat_ptr((compat_uptr_t)req->cmd),
|
||||
sizeof(struct drm_rockchip_rga_cmd) * req->cmd_nr))
|
||||
return -EFAULT;
|
||||
cmdlist->last += req->cmd_nr * 2;
|
||||
|
||||
if (copy_from_user(&cmdlist->data[cmdlist->last],
|
||||
compat_ptr((compat_uptr_t)req->cmd_buf),
|
||||
sizeof(struct drm_rockchip_rga_cmd) * req->cmd_buf_nr))
|
||||
return -EFAULT;
|
||||
cmdlist->last += req->cmd_buf_nr * 2;
|
||||
|
||||
/*
|
||||
* Check the userspace command registers, and mapping the framebuffer,
|
||||
* create the RGA mmu pages or get the framebuffer dma address.
|
||||
*/
|
||||
ret = rga_check_reg_offset(rga->dev, node);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
ret = rga_map_cmdlist_gem(rga, node, drm_dev, file);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
rga_add_cmdlist_to_inuse(rga_priv, node);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* IOCRL functions for userspace to start RGA transform.
|
||||
*/
|
||||
int rockchip_rga_exec_ioctl(struct drm_device *drm_dev, void *data,
|
||||
struct drm_file *file)
|
||||
{
|
||||
struct rockchip_drm_file_private *file_priv = file->driver_priv;
|
||||
struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
|
||||
struct rga_runqueue_node *runqueue;
|
||||
struct rockchip_rga *rga;
|
||||
struct device *dev;
|
||||
int ret;
|
||||
|
||||
if (!rga_priv)
|
||||
return -ENODEV;
|
||||
|
||||
dev = rga_priv->dev;
|
||||
if (!dev)
|
||||
return -ENODEV;
|
||||
|
||||
rga = dev_get_drvdata(dev);
|
||||
if (!rga)
|
||||
return -EFAULT;
|
||||
|
||||
runqueue = kmem_cache_alloc(rga->runqueue_slab, GFP_KERNEL);
|
||||
if (!runqueue) {
|
||||
dev_err(rga->dev, "failed to allocate memory\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
runqueue->dev = rga->dev;
|
||||
|
||||
init_completion(&runqueue->complete);
|
||||
|
||||
INIT_LIST_HEAD(&runqueue->run_cmdlist);
|
||||
|
||||
list_splice_init(&rga_priv->inuse_cmdlist, &runqueue->run_cmdlist);
|
||||
|
||||
if (list_empty(&runqueue->run_cmdlist)) {
|
||||
dev_err(rga->dev, "there is no inuse cmdlist\n");
|
||||
kmem_cache_free(rga->runqueue_slab, runqueue);
|
||||
return -EPERM;
|
||||
}
|
||||
|
||||
ret = rga_alloc_dma_buf_for_cmdlist(runqueue);
|
||||
if (ret < 0) {
|
||||
dev_err(rga->dev, "cmdlist init failed\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
mutex_lock(&rga->runqueue_mutex);
|
||||
runqueue->pid = current->pid;
|
||||
runqueue->file = file;
|
||||
list_add_tail(&runqueue->list, &rga->runqueue_list);
|
||||
if (!rga->runqueue_node)
|
||||
rga_exec_runqueue(rga);
|
||||
mutex_unlock(&rga->runqueue_mutex);
|
||||
|
||||
wait_for_completion(&runqueue->complete);
|
||||
rga_free_runqueue_node(rga, runqueue);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rockchip_rga_open(struct drm_device *drm_dev, struct device *dev,
|
||||
struct drm_file *file)
|
||||
{
|
||||
struct rockchip_drm_file_private *file_priv = file->driver_priv;
|
||||
struct rockchip_drm_rga_private *rga_priv;
|
||||
|
||||
rga_priv = kzalloc(sizeof(*rga_priv), GFP_KERNEL);
|
||||
if (!rga_priv)
|
||||
return -ENOMEM;
|
||||
|
||||
rga_priv->dev = dev;
|
||||
file_priv->rga_priv = rga_priv;
|
||||
|
||||
INIT_LIST_HEAD(&rga_priv->inuse_cmdlist);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void rockchip_rga_close(struct drm_device *drm_dev, struct device *dev,
|
||||
struct drm_file *file)
|
||||
{
|
||||
struct rockchip_drm_file_private *file_priv = file->driver_priv;
|
||||
struct rockchip_drm_rga_private *rga_priv = file_priv->rga_priv;
|
||||
struct rga_cmdlist_node *node, *n;
|
||||
struct rockchip_rga *rga;
|
||||
|
||||
if (!dev)
|
||||
return;
|
||||
|
||||
rga = dev_get_drvdata(dev);
|
||||
if (!rga)
|
||||
return;
|
||||
|
||||
mutex_lock(&rga->cmdlist_mutex);
|
||||
list_for_each_entry_safe(node, n, &rga_priv->inuse_cmdlist, list) {
|
||||
/*
|
||||
* unmap all gem objects not completed.
|
||||
*
|
||||
* P.S. if current process was terminated forcely then
|
||||
* there may be some commands in inuse_cmdlist so unmap
|
||||
* them.
|
||||
*/
|
||||
rga_unmap_cmdlist_gem(rga, node);
|
||||
list_move_tail(&node->list, &rga->free_cmdlist);
|
||||
}
|
||||
mutex_unlock(&rga->cmdlist_mutex);
|
||||
|
||||
kfree(file_priv->rga_priv);
|
||||
}
|
||||
|
||||
static void rga_runqueue_worker(struct work_struct *work)
|
||||
{
|
||||
struct rockchip_rga *rga = container_of(work, struct rockchip_rga,
|
||||
runqueue_work);
|
||||
|
||||
mutex_lock(&rga->runqueue_mutex);
|
||||
pm_runtime_put_sync(rga->dev);
|
||||
|
||||
complete(&rga->runqueue_node->complete);
|
||||
|
||||
if (rga->suspended)
|
||||
rga->runqueue_node = NULL;
|
||||
else
|
||||
rga_exec_runqueue(rga);
|
||||
|
||||
mutex_unlock(&rga->runqueue_mutex);
|
||||
}
|
||||
|
||||
static irqreturn_t rga_irq_handler(int irq, void *dev_id)
|
||||
{
|
||||
struct rockchip_rga *rga = dev_id;
|
||||
int intr;
|
||||
|
||||
intr = rga_read(rga, RGA_INT) & 0xf;
|
||||
|
||||
rga_mod(rga, RGA_INT, intr << 4, 0xf << 4);
|
||||
|
||||
if (intr & 0x04)
|
||||
queue_work(rga->rga_workq, &rga->runqueue_work);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static int rga_parse_dt(struct rockchip_rga *rga)
|
||||
{
|
||||
struct reset_control *core_rst, *axi_rst, *ahb_rst;
|
||||
|
||||
core_rst = devm_reset_control_get(rga->dev, "core");
|
||||
if (IS_ERR(core_rst)) {
|
||||
dev_err(rga->dev, "failed to get core reset controller\n");
|
||||
return PTR_ERR(core_rst);
|
||||
}
|
||||
|
||||
axi_rst = devm_reset_control_get(rga->dev, "axi");
|
||||
if (IS_ERR(axi_rst)) {
|
||||
dev_err(rga->dev, "failed to get axi reset controller\n");
|
||||
return PTR_ERR(axi_rst);
|
||||
}
|
||||
|
||||
ahb_rst = devm_reset_control_get(rga->dev, "ahb");
|
||||
if (IS_ERR(ahb_rst)) {
|
||||
dev_err(rga->dev, "failed to get ahb reset controller\n");
|
||||
return PTR_ERR(ahb_rst);
|
||||
}
|
||||
|
||||
reset_control_assert(core_rst);
|
||||
udelay(1);
|
||||
reset_control_deassert(core_rst);
|
||||
|
||||
reset_control_assert(axi_rst);
|
||||
udelay(1);
|
||||
reset_control_deassert(axi_rst);
|
||||
|
||||
reset_control_assert(ahb_rst);
|
||||
udelay(1);
|
||||
reset_control_deassert(ahb_rst);
|
||||
|
||||
rga->sclk = devm_clk_get(rga->dev, "sclk");
|
||||
if (IS_ERR(rga->sclk)) {
|
||||
dev_err(rga->dev, "failed to get sclk clock\n");
|
||||
return PTR_ERR(rga->sclk);
|
||||
}
|
||||
|
||||
rga->aclk = devm_clk_get(rga->dev, "aclk");
|
||||
if (IS_ERR(rga->aclk)) {
|
||||
dev_err(rga->dev, "failed to get aclk clock\n");
|
||||
return PTR_ERR(rga->aclk);
|
||||
}
|
||||
|
||||
rga->hclk = devm_clk_get(rga->dev, "hclk");
|
||||
if (IS_ERR(rga->hclk)) {
|
||||
dev_err(rga->dev, "failed to get hclk clock\n");
|
||||
return PTR_ERR(rga->hclk);
|
||||
}
|
||||
|
||||
return rga_enable_clocks(rga);
|
||||
}
|
||||
|
||||
static const struct of_device_id rockchip_rga_dt_ids[] = {
|
||||
{ .compatible = "rockchip,rk3288-rga", },
|
||||
{ .compatible = "rockchip,rk3228-rga", },
|
||||
{ .compatible = "rockchip,rk3399-rga", },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, rockchip_rga_dt_ids);
|
||||
|
||||
static int rga_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct drm_rockchip_subdrv *subdrv;
|
||||
struct rockchip_rga *rga;
|
||||
struct resource *iores;
|
||||
int irq;
|
||||
int ret;
|
||||
|
||||
if (!pdev->dev.of_node)
|
||||
return -ENODEV;
|
||||
|
||||
rga = devm_kzalloc(&pdev->dev, sizeof(*rga), GFP_KERNEL);
|
||||
if (!rga)
|
||||
return -ENOMEM;
|
||||
|
||||
rga->dev = &pdev->dev;
|
||||
|
||||
rga->runqueue_slab = kmem_cache_create("rga_runqueue_slab",
|
||||
sizeof(struct rga_runqueue_node),
|
||||
0, 0, NULL);
|
||||
if (!rga->runqueue_slab)
|
||||
return -ENOMEM;
|
||||
|
||||
rga->rga_workq = create_singlethread_workqueue("rga");
|
||||
if (!rga->rga_workq) {
|
||||
dev_err(rga->dev, "failed to create workqueue\n");
|
||||
goto err_destroy_slab;
|
||||
}
|
||||
|
||||
INIT_WORK(&rga->runqueue_work, rga_runqueue_worker);
|
||||
INIT_LIST_HEAD(&rga->runqueue_list);
|
||||
mutex_init(&rga->runqueue_mutex);
|
||||
|
||||
INIT_LIST_HEAD(&rga->free_cmdlist);
|
||||
mutex_init(&rga->cmdlist_mutex);
|
||||
|
||||
rga_init_cmdlist(rga);
|
||||
|
||||
ret = rga_parse_dt(rga);
|
||||
if (ret) {
|
||||
dev_err(rga->dev, "Unable to parse OF data\n");
|
||||
goto err_destroy_workqueue;
|
||||
}
|
||||
|
||||
pm_runtime_enable(rga->dev);
|
||||
|
||||
iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
|
||||
rga->regs = devm_ioremap_resource(rga->dev, iores);
|
||||
if (IS_ERR(rga->regs)) {
|
||||
ret = PTR_ERR(rga->regs);
|
||||
goto err_put_clk;
|
||||
}
|
||||
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq < 0) {
|
||||
dev_err(rga->dev, "failed to get irq\n");
|
||||
ret = irq;
|
||||
goto err_put_clk;
|
||||
}
|
||||
|
||||
ret = devm_request_irq(rga->dev, irq, rga_irq_handler, 0,
|
||||
dev_name(rga->dev), rga);
|
||||
if (ret < 0) {
|
||||
dev_err(rga->dev, "failed to request irq\n");
|
||||
goto err_put_clk;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, rga);
|
||||
|
||||
rga->version.major = (rga_read(rga, RGA_VERSION_INFO) >> 24) & 0xFF;
|
||||
rga->version.minor = (rga_read(rga, RGA_VERSION_INFO) >> 20) & 0x0F;
|
||||
|
||||
subdrv = &rga->subdrv;
|
||||
subdrv->dev = rga->dev;
|
||||
subdrv->open = rockchip_rga_open;
|
||||
subdrv->close = rockchip_rga_close;
|
||||
|
||||
rockchip_drm_register_subdrv(subdrv);
|
||||
|
||||
return 0;
|
||||
|
||||
err_put_clk:
|
||||
pm_runtime_disable(rga->dev);
|
||||
err_destroy_workqueue:
|
||||
destroy_workqueue(rga->rga_workq);
|
||||
err_destroy_slab:
|
||||
kmem_cache_destroy(rga->runqueue_slab);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rga_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rockchip_rga *rga = platform_get_drvdata(pdev);
|
||||
|
||||
cancel_work_sync(&rga->runqueue_work);
|
||||
|
||||
while (rga->runqueue_node) {
|
||||
rga_free_runqueue_node(rga, rga->runqueue_node);
|
||||
rga->runqueue_node = rga_get_runqueue(rga);
|
||||
}
|
||||
|
||||
rockchip_drm_unregister_subdrv(&rga->subdrv);
|
||||
|
||||
pm_runtime_disable(rga->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rga_suspend(struct device *dev)
|
||||
{
|
||||
struct rockchip_rga *rga = dev_get_drvdata(dev);
|
||||
|
||||
mutex_lock(&rga->runqueue_mutex);
|
||||
rga->suspended = true;
|
||||
mutex_unlock(&rga->runqueue_mutex);
|
||||
|
||||
flush_work(&rga->runqueue_work);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rga_resume(struct device *dev)
|
||||
{
|
||||
struct rockchip_rga *rga = dev_get_drvdata(dev);
|
||||
|
||||
rga->suspended = false;
|
||||
rga_exec_runqueue(rga);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int rga_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct rockchip_rga *rga = dev_get_drvdata(dev);
|
||||
|
||||
rga_disable_clocks(rga);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rga_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct rockchip_rga *rga = dev_get_drvdata(dev);
|
||||
|
||||
return rga_enable_clocks(rga);
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops rga_pm = {
|
||||
SET_SYSTEM_SLEEP_PM_OPS(rga_suspend, rga_resume)
|
||||
SET_RUNTIME_PM_OPS(rga_runtime_suspend,
|
||||
rga_runtime_resume, NULL)
|
||||
};
|
||||
|
||||
static struct platform_driver rga_pltfm_driver = {
|
||||
.probe = rga_probe,
|
||||
.remove = rga_remove,
|
||||
.driver = {
|
||||
.name = "rockchip-rga",
|
||||
.pm = &rga_pm,
|
||||
.of_match_table = rockchip_rga_dt_ids,
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(rga_pltfm_driver);
|
||||
|
||||
MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
|
||||
MODULE_DESCRIPTION("Rockchip RGA Driver Extension");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_ALIAS("platform:rockchip-rga");
|
||||
108
drivers/gpu/drm/rockchip/rockchip_drm_rga.h
Normal file
108
drivers/gpu/drm/rockchip/rockchip_drm_rga.h
Normal file
|
|
@ -0,0 +1,108 @@
|
|||
#ifndef __ROCKCHIP_DRM_RGA__
|
||||
#define __ROCKCHIP_DRM_RGA__
|
||||
|
||||
#define RGA_CMDBUF_SIZE 14
|
||||
#define RGA_CMDLIST_SIZE 0x20
|
||||
#define RGA_CMDLIST_NUM 64
|
||||
|
||||
/* cmdlist data structure */
|
||||
struct rga_cmdlist {
|
||||
u32 head;
|
||||
u32 data[RGA_CMDLIST_SIZE * 2];
|
||||
u32 last; /* last data offset */
|
||||
void *src_mmu_pages;
|
||||
void *dst_mmu_pages;
|
||||
void *src1_mmu_pages;
|
||||
struct dma_buf_attachment *src_attach;
|
||||
struct dma_buf_attachment *dst_attach;
|
||||
};
|
||||
|
||||
struct rga_cmdlist_node {
|
||||
struct list_head list;
|
||||
struct rga_cmdlist cmdlist;
|
||||
};
|
||||
|
||||
struct rga_runqueue_node {
|
||||
struct list_head list;
|
||||
|
||||
struct device *dev;
|
||||
pid_t pid;
|
||||
struct drm_file *file;
|
||||
struct completion complete;
|
||||
|
||||
struct list_head run_cmdlist;
|
||||
|
||||
int cmdlist_cnt;
|
||||
void *cmdlist_pool_virt;
|
||||
dma_addr_t cmdlist_pool;
|
||||
struct dma_attrs cmdlist_dma_attrs;
|
||||
};
|
||||
|
||||
struct rockchip_rga_version {
|
||||
u32 major;
|
||||
u32 minor;
|
||||
};
|
||||
|
||||
struct rockchip_rga {
|
||||
struct drm_device *drm_dev;
|
||||
struct device *dev;
|
||||
struct regmap *grf;
|
||||
void __iomem *regs;
|
||||
struct clk *sclk;
|
||||
struct clk *aclk;
|
||||
struct clk *hclk;
|
||||
|
||||
bool suspended;
|
||||
struct rockchip_rga_version version;
|
||||
struct drm_rockchip_subdrv subdrv;
|
||||
struct workqueue_struct *rga_workq;
|
||||
struct work_struct runqueue_work;
|
||||
|
||||
/* rga command list pool */
|
||||
struct rga_cmdlist_node cmdlist_node[RGA_CMDLIST_NUM];
|
||||
struct mutex cmdlist_mutex;
|
||||
|
||||
struct list_head free_cmdlist;
|
||||
|
||||
/* rga runqueue */
|
||||
struct rga_runqueue_node *runqueue_node;
|
||||
struct list_head runqueue_list;
|
||||
struct mutex runqueue_mutex;
|
||||
struct kmem_cache *runqueue_slab;
|
||||
};
|
||||
|
||||
struct rockchip_drm_rga_private {
|
||||
struct device *dev;
|
||||
struct list_head inuse_cmdlist;
|
||||
struct list_head userptr_list;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_ROCKCHIP_DRM_RGA
|
||||
int rockchip_rga_get_ver_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv);
|
||||
int rockchip_rga_set_cmdlist_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv);
|
||||
int rockchip_rga_exec_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv);
|
||||
#else
|
||||
static inline int rockchip_rga_get_ver_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int rockchip_rga_set_cmdlist_ioctl(struct drm_device *dev,
|
||||
void *data,
|
||||
struct drm_file *file_priv)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static inline int rockchip_rga_exec_ioctl(struct drm_device *dev, void *data,
|
||||
struct drm_file *file_priv)
|
||||
{
|
||||
return -ENODEV;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ROCKCHIP_DRM_RGA__ */
|
||||
|
|
@ -71,11 +71,42 @@ struct drm_rockchip_gem_cpu_release {
|
|||
uint32_t handle;
|
||||
};
|
||||
|
||||
struct drm_rockchip_rga_get_ver {
|
||||
__u32 major;
|
||||
__u32 minor;
|
||||
};
|
||||
|
||||
struct drm_rockchip_rga_cmd {
|
||||
__u32 offset;
|
||||
__u32 data;
|
||||
};
|
||||
|
||||
enum drm_rockchip_rga_buf_type {
|
||||
RGA_BUF_TYPE_USERPTR = 1 << 31,
|
||||
RGA_BUF_TYPE_GEMFD = 1 << 30,
|
||||
};
|
||||
|
||||
struct drm_rockchip_rga_set_cmdlist {
|
||||
__u64 cmd;
|
||||
__u64 cmd_buf;
|
||||
__u32 cmd_nr;
|
||||
__u32 cmd_buf_nr;
|
||||
__u64 user_data;
|
||||
};
|
||||
|
||||
struct drm_rockchip_rga_exec {
|
||||
__u64 async;
|
||||
};
|
||||
|
||||
#define DRM_ROCKCHIP_GEM_CREATE 0x00
|
||||
#define DRM_ROCKCHIP_GEM_MAP_OFFSET 0x01
|
||||
#define DRM_ROCKCHIP_GEM_CPU_ACQUIRE 0x02
|
||||
#define DRM_ROCKCHIP_GEM_CPU_RELEASE 0x03
|
||||
|
||||
#define DRM_ROCKCHIP_RGA_GET_VER 0x20
|
||||
#define DRM_ROCKCHIP_RGA_SET_CMDLIST 0x21
|
||||
#define DRM_ROCKCHIP_RGA_EXEC 0x22
|
||||
|
||||
#define DRM_IOCTL_ROCKCHIP_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + \
|
||||
DRM_ROCKCHIP_GEM_CREATE, struct drm_rockchip_gem_create)
|
||||
|
||||
|
|
@ -88,4 +119,13 @@ struct drm_rockchip_gem_cpu_release {
|
|||
#define DRM_IOCTL_ROCKCHIP_GEM_CPU_RELEASE DRM_IOWR(DRM_COMMAND_BASE + \
|
||||
DRM_ROCKCHIP_GEM_CPU_RELEASE, struct drm_rockchip_gem_cpu_release)
|
||||
|
||||
#define DRM_IOCTL_ROCKCHIP_RGA_GET_VER DRM_IOWR(DRM_COMMAND_BASE + \
|
||||
DRM_ROCKCHIP_RGA_GET_VER, struct drm_rockchip_rga_get_ver)
|
||||
|
||||
#define DRM_IOCTL_ROCKCHIP_RGA_SET_CMDLIST DRM_IOWR(DRM_COMMAND_BASE + \
|
||||
DRM_ROCKCHIP_RGA_SET_CMDLIST, struct drm_rockchip_rga_set_cmdlist)
|
||||
|
||||
#define DRM_IOCTL_ROCKCHIP_RGA_EXEC DRM_IOWR(DRM_COMMAND_BASE + \
|
||||
DRM_ROCKCHIP_RGA_EXEC, struct drm_rockchip_rga_exec)
|
||||
|
||||
#endif /* _UAPI_ROCKCHIP_DRM_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user