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iio: adc: stm32: fix maximum clock rate for stm32mp15x

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commit 990539486e upstream.

Change maximum STM32 ADC input clock rate to 36MHz, as specified
in STM32MP15x datasheets.

Fixes: d58c67d1d8 ("iio: adc: stm32-adc: add support for STM32MP1")
Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20220609095234.375925-1-olivier.moysan@foss.st.com
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Olivier Moysan 2022-06-09 11:52:34 +02:00 committed by Greg Kroah-Hartman
parent b07a30a774
commit 3e0af68b99
1 changed files with 1 additions and 1 deletions
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2
drivers/iio/adc/stm32-adc-core.c
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@ -797,7 +797,7 @@ static const struct stm32_adc_priv_cfg stm32h7_adc_priv_cfg = {
static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = { static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = {
.regs = &stm32h7_adc_common_regs, .regs = &stm32h7_adc_common_regs,
.clk_sel = stm32h7_adc_clk_sel, .clk_sel = stm32h7_adc_clk_sel,
.max_clk_rate_hz = 40000000, .max_clk_rate_hz = 36000000,
.has_syscfg = HAS_VBOOSTER | HAS_ANASWVDD, .has_syscfg = HAS_VBOOSTER | HAS_ANASWVDD,
.num_irqs = 2, .num_irqs = 2,
}; };