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Qualcomm ARM64 fixes for 5.11
This fixes a regression in Lenovo Yoga C630, where the touchpad in some units stopped working, by re-enabling the "tsc2" device. It also marks the LPASS related clocks as protected to allow DB845c and the Lenovo Yoga C630 to boot even if CONFIG_SDM_LPASSCC_845 is enabled. -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmAPUbIbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FKqMQAJiSDNHLxYs9MsenWJe4 DOdJia2nWLBLcs7JNMk2Of+DisNKxqfa0qWClVCQSLd2s2fymCPtTCBtE0eaVhAd i7AcOyjnohyanKbwjfjbCRR3mLcuK5xRyQBIperTholtK0d5TnG78sGA/Xadcre9 zflJ5aF7UshLTj1AVy+B35LG3diNQevzZaKMGlVViR7Z6F4dps4duPT3hZETjXWD 3JWBki/poko9pN8X2H90g1yVmdr1azS2/8zjMtEhCOX5d+O/az6wPr8m5qpFCYDm jZQ2238MjLcwyxYOtIhNQjC569RbQowE3yFVPzL5KJ89khsoZk/ypzWeTdgrxCzz 5TfFUUHlautQBKED3DBTmmn95duJV+wXkzz5RgE0RWv8x0Srn/mgmgnZNjY6CE2b u0s3tyrq23guAN3aPYzAu1nN2MAwM+1NnHzQEk7Xr740YE8B7CvK34jBtfFAQsgL iVA7FbkXBwacb3BojmHj29XdaMUqSLRSNhMiBns+Xcf6ap28w4mOmhGnZJpqhz2r guW4Hla2qhiXL5wmyCNY4x/aMfzVl9aNB+ETFdKrfRNAeRzKfr1/8h4BCW4BThZE JlRJFuSGOfVT4Sa/u7M/+HbWKeEbcGhi6Q/YxSO0Xb0MvOUPbJimxohm+TDurS8F MIP8XGa1AGi73r/L0wMgFRA0 =E0WN -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-fixes-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm ARM64 fixes for 5.11 This fixes a regression in Lenovo Yoga C630, where the touchpad in some units stopped working, by re-enabling the "tsc2" device. It also marks the LPASS related clocks as protected to allow DB845c and the Lenovo Yoga C630 to boot even if CONFIG_SDM_LPASSCC_845 is enabled. * tag 'qcom-arm64-fixes-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc arm64: dts: qcom: c630: keep both touchpad devices enabled Link: https://lore.kernel.org/r/20210125232039.642565-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
3de834b292
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@ -415,7 +415,9 @@ &dsi0_phy {
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&gcc {
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protected-clocks = <GCC_QSPI_CORE_CLK>,
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<GCC_QSPI_CORE_CLK_SRC>,
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
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<GCC_LPASS_Q6_AXI_CLK>,
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<GCC_LPASS_SWAY_CLK>;
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};
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&gpu {
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@ -302,7 +302,9 @@ &dsi0_phy {
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&gcc {
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protected-clocks = <GCC_QSPI_CORE_CLK>,
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<GCC_QSPI_CORE_CLK_SRC>,
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
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<GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
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<GCC_LPASS_Q6_AXI_CLK>,
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<GCC_LPASS_SWAY_CLK>;
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};
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&gpu {
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@ -320,6 +322,8 @@ &i2c1 {
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&i2c3 {
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status = "okay";
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clock-frequency = <400000>;
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/* Overwrite pinctrl-0 from sdm845.dtsi */
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pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
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tsel: hid@15 {
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compatible = "hid-over-i2c";
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@ -327,9 +331,6 @@ tsel: hid@15 {
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hid-descr-addr = <0x1>;
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interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_hid_active>;
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};
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tsc2: hid@2c {
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@ -338,11 +339,6 @@ tsc2: hid@2c {
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hid-descr-addr = <0x20>;
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interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_hid_active>;
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status = "disabled";
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};
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};
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