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Merge 5b47b10e8f ("Merge tag 'pci-v5.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci") into android-mainline
Steps on the way to 5.12-rc1 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> Change-Id: I8330e967324622f71630bd9ee9e19086688d068e
This commit is contained in:
Greg Kroah-Hartman
commit
3db2a71497
8
CREDITS
8
CREDITS
|
|
@ -1244,10 +1244,10 @@ S: 80050-430 - Curitiba - Paraná
|
|||
S: Brazil
|
||||
|
||||
N: Oded Gabbay
|
||||
E: oded.gabbay@gmail.com
|
||||
D: HabanaLabs and AMD KFD maintainer
|
||||
S: 12 Shraga Raphaeli
|
||||
S: Petah-Tikva, 4906418
|
||||
E: ogabbay@kernel.org
|
||||
D: HabanaLabs maintainer
|
||||
S: 29 Duchifat St.
|
||||
S: Ra'anana 4372029
|
||||
S: Israel
|
||||
|
||||
N: Kumar Gala
|
||||
|
|
|
|||
19
Documentation/ABI/stable/sysfs-bus-fsl-mc
Normal file
19
Documentation/ABI/stable/sysfs-bus-fsl-mc
Normal file
|
|
@ -0,0 +1,19 @@
|
|||
What: /sys/bus/fsl-mc/rescan
|
||||
Date: January 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Ioana Ciornei <ioana.ciornei@nxp.com>
|
||||
Description: Writing a non-zero value to this attribute will
|
||||
force a rescan of fsl-mc bus in the system and
|
||||
synchronize the objects under fsl-mc bus and the
|
||||
Management Complex firmware.
|
||||
Users: Userspace drivers and management tools
|
||||
|
||||
What: /sys/bus/fsl-mc/autorescan
|
||||
Date: January 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Ioana Ciornei <ioana.ciornei@nxp.com>
|
||||
Description: Writing a zero value to this attribute will
|
||||
disable the DPRC IRQs on which automatic rescan
|
||||
of the fsl-mc bus is performed. A non-zero value
|
||||
will enable the DPRC IRQs.
|
||||
Users: Userspace drivers and management tools
|
||||
|
|
@ -273,7 +273,7 @@ Description: In `/sys/accessibility/speakup` is a directory corresponding to
|
|||
Below is a description of values and parameters for soft
|
||||
synthesizer, which is currently the most commonly used.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/caps_start
|
||||
What: /sys/accessibility/speakup/<synth-name>/caps_start
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||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: This is the string that is sent to the synthesizer to cause it
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|
|
@ -281,7 +281,7 @@ Description: This is the string that is sent to the synthesizer to cause it
|
|||
and most others, this causes the pitch of the voice to rise
|
||||
above the currently set pitch.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/caps_stop
|
||||
What: /sys/accessibility/speakup/<synth-name>/caps_stop
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: This is the string sent to the synthesizer to cause it to stop
|
||||
|
|
@ -290,12 +290,12 @@ Description: This is the string sent to the synthesizer to cause it to stop
|
|||
down to the
|
||||
currently set pitch.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/delay_time
|
||||
What: /sys/accessibility/speakup/<synth-name>/delay_time
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: TODO:
|
||||
|
||||
What: /sys/accessibility/speakup/soft/direct
|
||||
What: /sys/accessibility/speakup/<synth-name>/direct
|
||||
KernelVersion: 2.6
|
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Contact: speakup@linux-speakup.org
|
||||
Description: Controls if punctuation is spoken by speakup, or by the
|
||||
|
|
@ -306,36 +306,43 @@ Description: Controls if punctuation is spoken by speakup, or by the
|
|||
than". Zero lets speakup speak the punctuation. One lets the
|
||||
synthesizer itself speak punctuation.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/freq
|
||||
What: /sys/accessibility/speakup/<synth-name>/freq
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the frequency of the speech synthesizer. Range is
|
||||
0-9.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/full_time
|
||||
What: /sys/accessibility/speakup/<synth-name>/flush_time
|
||||
KernelVersion: 5.12
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the timeout to wait for the synthesizer flush to
|
||||
complete. This can be used when the cable gets faulty and flush
|
||||
notifications are getting lost.
|
||||
|
||||
What: /sys/accessibility/speakup/<synth-name>/full_time
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: TODO:
|
||||
|
||||
What: /sys/accessibility/speakup/soft/jiffy_delta
|
||||
What: /sys/accessibility/speakup/<synth-name>/jiffy_delta
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: This controls how many jiffys the kernel gives to the
|
||||
synthesizer. Setting this too high can make a system unstable,
|
||||
or even crash it.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/pitch
|
||||
What: /sys/accessibility/speakup/<synth-name>/pitch
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the pitch of the synthesizer. The range is 0-9.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/inflection
|
||||
What: /sys/accessibility/speakup/<synth-name>/inflection
|
||||
KernelVersion: 5.8
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the inflection of the synthesizer, i.e. the pitch
|
||||
range. The range is 0-9.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/punct
|
||||
What: /sys/accessibility/speakup/<synth-name>/punct
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the amount of punctuation spoken by the
|
||||
|
|
@ -343,13 +350,13 @@ Description: Gets or sets the amount of punctuation spoken by the
|
|||
TODO: How is this related to speakup's punc_level, or
|
||||
reading_punc.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/rate
|
||||
What: /sys/accessibility/speakup/<synth-name>/rate
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the rate of the synthesizer. Range is from zero
|
||||
slowest, to nine fastest.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/tone
|
||||
What: /sys/accessibility/speakup/<synth-name>/tone
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the tone of the speech synthesizer. The range for
|
||||
|
|
@ -357,12 +364,12 @@ Description: Gets or sets the tone of the speech synthesizer. The range for
|
|||
difference if using espeak and the espeakup connector.
|
||||
TODO: does espeakup support different tonalities?
|
||||
|
||||
What: /sys/accessibility/speakup/soft/trigger_time
|
||||
What: /sys/accessibility/speakup/<synth-name>/trigger_time
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: TODO:
|
||||
|
||||
What: /sys/accessibility/speakup/soft/voice
|
||||
What: /sys/accessibility/speakup/<synth-name>/voice
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the voice used by the synthesizer if the
|
||||
|
|
@ -371,7 +378,7 @@ Description: Gets or sets the voice used by the synthesizer if the
|
|||
voices, this parameter will not set the voice when the espeakup
|
||||
connector is used between speakup and espeak.
|
||||
|
||||
What: /sys/accessibility/speakup/soft/vol
|
||||
What: /sys/accessibility/speakup/<synth-name>/vol
|
||||
KernelVersion: 2.6
|
||||
Contact: speakup@linux-speakup.org
|
||||
Description: Gets or sets the volume of the speech synthesizer. Range is 0-9,
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/addr
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets the device address to be used for read or write through
|
||||
PCI bar, or the device VA of a host mapped memory to be read or
|
||||
written directly from the host. The latter option is allowed
|
||||
|
|
@ -11,7 +11,7 @@ Description: Sets the device address to be used for read or write through
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/clk_gate
|
||||
Date: May 2020
|
||||
KernelVersion: 5.8
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allow the root user to disable/enable in runtime the clock
|
||||
gating mechanism in Gaudi. Due to how Gaudi is built, the
|
||||
clock gating needs to be disabled in order to access the
|
||||
|
|
@ -34,28 +34,28 @@ Description: Allow the root user to disable/enable in runtime the clock
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/command_buffers
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays a list with information about the currently allocated
|
||||
command buffers
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/command_submission
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays a list with information about the currently active
|
||||
command submissions
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/command_submission_jobs
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays a list with detailed information about each JOB (CB) of
|
||||
each active command submission
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/data32
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allows the root user to read or write directly through the
|
||||
device's PCI bar. Writing to this file generates a write
|
||||
transaction while reading from the file generates a read
|
||||
|
|
@ -70,7 +70,7 @@ Description: Allows the root user to read or write directly through the
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/data64
|
||||
Date: Jan 2020
|
||||
KernelVersion: 5.6
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allows the root user to read or write 64 bit data directly
|
||||
through the device's PCI bar. Writing to this file generates a
|
||||
write transaction while reading from the file generates a read
|
||||
|
|
@ -85,7 +85,7 @@ Description: Allows the root user to read or write 64 bit data directly
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/device
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Enables the root user to set the device to specific state.
|
||||
Valid values are "disable", "enable", "suspend", "resume".
|
||||
User can read this property to see the valid values
|
||||
|
|
@ -93,28 +93,28 @@ Description: Enables the root user to set the device to specific state.
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/engines
|
||||
Date: Jul 2019
|
||||
KernelVersion: 5.3
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the status registers values of the device engines and
|
||||
their derived idle status
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/i2c_addr
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets I2C device address for I2C transaction that is generated
|
||||
by the device's CPU
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/i2c_bus
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets I2C bus address for I2C transaction that is generated by
|
||||
the device's CPU
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/i2c_data
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Triggers an I2C transaction that is generated by the device's
|
||||
CPU. Writing to this file generates a write transaction while
|
||||
reading from the file generates a read transcation
|
||||
|
|
@ -122,32 +122,32 @@ Description: Triggers an I2C transaction that is generated by the device's
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/i2c_reg
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets I2C register id for I2C transaction that is generated by
|
||||
the device's CPU
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/led0
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets the state of the first S/W led on the device
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/led1
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets the state of the second S/W led on the device
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/led2
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets the state of the third S/W led on the device
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/mmu
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the hop values and physical address for a given ASID
|
||||
and virtual address. The user should write the ASID and VA into
|
||||
the file and then read the file to get the result.
|
||||
|
|
@ -157,14 +157,14 @@ Description: Displays the hop values and physical address for a given ASID
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/set_power_state
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets the PCI power state. Valid values are "1" for D0 and "2"
|
||||
for D3Hot
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/userptr
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays a list with information about the currently user
|
||||
pointers (user virtual addresses) that are pinned and mapped
|
||||
to DMA addresses
|
||||
|
|
@ -172,13 +172,21 @@ Description: Displays a list with information about the currently user
|
|||
What: /sys/kernel/debug/habanalabs/hl<n>/vm
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays a list with information about all the active virtual
|
||||
address mappings per ASID
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/stop_on_err
|
||||
Date: Mar 2020
|
||||
KernelVersion: 5.6
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Sets the stop-on_error option for the device engines. Value of
|
||||
"0" is for disable, otherwise enable.
|
||||
|
||||
What: /sys/kernel/debug/habanalabs/hl<n>/dump_security_violations
|
||||
Date: Jan 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Dumps all security violations to dmesg. This will also ack
|
||||
all security violations meanings those violations will not be
|
||||
dumped next time user calls this API
|
||||
|
|
|
|||
|
|
@ -371,6 +371,14 @@ Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
|||
Description: (Read) Print the content of the Device ID Register
|
||||
(0xFC8). The value is taken directly from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevarch
|
||||
Date: January 2021
|
||||
KernelVersion: 5.12
|
||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||
Description: (Read) Print the content of the Device Architecture Register
|
||||
(offset 0xFBC). The value is taken directly read
|
||||
from the HW.
|
||||
|
||||
What: /sys/bus/coresight/devices/etm<N>/mgmt/trcdevtype
|
||||
Date: April 2015
|
||||
KernelVersion: 4.01
|
||||
|
|
|
|||
25
Documentation/ABI/testing/sysfs-bus-dfl-devices-emif
Normal file
25
Documentation/ABI/testing/sysfs-bus-dfl-devices-emif
Normal file
|
|
@ -0,0 +1,25 @@
|
|||
What: /sys/bus/dfl/devices/dfl_dev.X/infX_cal_fail
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.12
|
||||
Contact: Xu Yilun <yilun.xu@intel.com>
|
||||
Description: Read-only. It indicates if the calibration failed on this
|
||||
memory interface. "1" for calibration failure, "0" for OK.
|
||||
Format: %u
|
||||
|
||||
What: /sys/bus/dfl/devices/dfl_dev.X/infX_init_done
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.12
|
||||
Contact: Xu Yilun <yilun.xu@intel.com>
|
||||
Description: Read-only. It indicates if the initialization completed on
|
||||
this memory interface. "1" for initialization complete, "0"
|
||||
for not yet.
|
||||
Format: %u
|
||||
|
||||
What: /sys/bus/dfl/devices/dfl_dev.X/infX_clear
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.12
|
||||
Contact: Xu Yilun <yilun.xu@intel.com>
|
||||
Description: Write-only. Writing "1" to this file will zero out all memory
|
||||
data in this memory interface. Writing of other values is
|
||||
invalid.
|
||||
Format: %u
|
||||
47
Documentation/ABI/testing/sysfs-bus-dfl-devices-n3000-nios
Normal file
47
Documentation/ABI/testing/sysfs-bus-dfl-devices-n3000-nios
Normal file
|
|
@ -0,0 +1,47 @@
|
|||
What: /sys/bus/dfl/devices/dfl_dev.X/fec_mode
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.12
|
||||
Contact: Xu Yilun <yilun.xu@intel.com>
|
||||
Description: Read-only. Returns the FEC mode of the 25G links of the
|
||||
ethernet retimers configured by Nios firmware. "rs" for Reed
|
||||
Solomon FEC, "kr" for Fire Code FEC, "no" for NO FEC.
|
||||
"not supported" if the FEC mode setting is not supported, this
|
||||
happens when the Nios firmware version major < 3, or no link is
|
||||
configured to 25G.
|
||||
Format: string
|
||||
|
||||
What: /sys/bus/dfl/devices/dfl_dev.X/retimer_A_mode
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.12
|
||||
Contact: Xu Yilun <yilun.xu@intel.com>
|
||||
Description: Read-only. Returns the enumeration value of the working mode of
|
||||
the retimer A configured by the Nios firmware. The value is
|
||||
read out from shared registers filled by the Nios firmware. Now
|
||||
the values could be:
|
||||
|
||||
- "0": Reset
|
||||
- "1": 4x10G
|
||||
- "2": 4x25G
|
||||
- "3": 2x25G
|
||||
- "4": 2x25G+2x10G
|
||||
- "5": 1x25G
|
||||
|
||||
If the Nios firmware is updated in future to support more
|
||||
retimer modes, more enumeration value is expected.
|
||||
Format: 0x%x
|
||||
|
||||
What: /sys/bus/dfl/devices/dfl_dev.X/retimer_B_mode
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.12
|
||||
Contact: Xu Yilun <yilun.xu@intel.com>
|
||||
Description: Read-only. Returns the enumeration value of the working mode of
|
||||
the retimer B configured by the Nios firmware. The value format
|
||||
is the same as retimer_A_mode.
|
||||
|
||||
What: /sys/bus/dfl/devices/dfl_dev.X/nios_fw_version
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.12
|
||||
Contact: Xu Yilun <yilun.xu@intel.com>
|
||||
Description: Read-only. Returns the version of the Nios firmware in the
|
||||
FPGA. Its format is "major.minor.patch".
|
||||
Format: %x.%x.%x
|
||||
24
Documentation/ABI/testing/sysfs-bus-pci-devices-pvpanic
Normal file
24
Documentation/ABI/testing/sysfs-bus-pci-devices-pvpanic
Normal file
|
|
@ -0,0 +1,24 @@
|
|||
What: /sys/devices/pci0000:00/*/QEMU0001:00/capability
|
||||
Date: Jan 2021
|
||||
Contact: zhenwei pi <pizhenwei@bytedance.com>
|
||||
Description:
|
||||
Read-only attribute. Capabilities of pvpanic device which
|
||||
are supported by QEMU.
|
||||
|
||||
Format: %x.
|
||||
|
||||
Detailed bit definition refers to section <Bit Definition>
|
||||
from pvpanic device specification:
|
||||
https://git.qemu.org/?p=qemu.git;a=blob_plain;f=docs/specs/pvpanic.txt
|
||||
|
||||
What: /sys/devices/pci0000:00/*/QEMU0001:00/events
|
||||
Date: Jan 2021
|
||||
Contact: zhenwei pi <pizhenwei@bytedance.com>
|
||||
Description:
|
||||
RW attribute. Set/get which features in-use. This attribute
|
||||
is used to enable/disable feature(s) of pvpanic device.
|
||||
Notice that this value should be a subset of capability.
|
||||
|
||||
Format: %x.
|
||||
|
||||
Also refer to pvpanic device specification.
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
What: /sys/class/habanalabs/hl<n>/armcp_kernel_ver
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the Linux kernel running on the device's CPU.
|
||||
Will be DEPRECATED in Linux kernel version 5.10, and be
|
||||
replaced with cpucp_kernel_ver
|
||||
|
|
@ -9,7 +9,7 @@ Description: Version of the Linux kernel running on the device's CPU.
|
|||
What: /sys/class/habanalabs/hl<n>/armcp_ver
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the application running on the device's CPU
|
||||
Will be DEPRECATED in Linux kernel version 5.10, and be
|
||||
replaced with cpucp_ver
|
||||
|
|
@ -17,7 +17,7 @@ Description: Version of the application running on the device's CPU
|
|||
What: /sys/class/habanalabs/hl<n>/clk_max_freq_mhz
|
||||
Date: Jun 2019
|
||||
KernelVersion: not yet upstreamed
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allows the user to set the maximum clock frequency, in MHz.
|
||||
The device clock might be set to lower value than the maximum.
|
||||
The user should read the clk_cur_freq_mhz to see the actual
|
||||
|
|
@ -27,52 +27,52 @@ Description: Allows the user to set the maximum clock frequency, in MHz.
|
|||
What: /sys/class/habanalabs/hl<n>/clk_cur_freq_mhz
|
||||
Date: Jun 2019
|
||||
KernelVersion: not yet upstreamed
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the current frequency, in MHz, of the device clock.
|
||||
This property is valid only for the Gaudi ASIC family
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/cpld_ver
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the Device's CPLD F/W
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/cpucp_kernel_ver
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.10
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the Linux kernel running on the device's CPU
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/cpucp_ver
|
||||
Date: Oct 2020
|
||||
KernelVersion: 5.10
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the application running on the device's CPU
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/device_type
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the code name of the device according to its type.
|
||||
The supported values are: "GOYA"
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/eeprom
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: A binary file attribute that contains the contents of the
|
||||
on-board EEPROM
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/fuse_ver
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the device's version from the eFuse
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/hard_reset
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Interface to trigger a hard-reset operation for the device.
|
||||
Hard-reset will reset ALL internal components of the device
|
||||
except for the PCI interface and the internal PLLs
|
||||
|
|
@ -80,14 +80,14 @@ Description: Interface to trigger a hard-reset operation for the device.
|
|||
What: /sys/class/habanalabs/hl<n>/hard_reset_cnt
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays how many times the device have undergone a hard-reset
|
||||
operation since the driver was loaded
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/high_pll
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allows the user to set the maximum clock frequency for MME, TPC
|
||||
and IC when the power management profile is set to "automatic".
|
||||
This property is valid only for the Goya ASIC family
|
||||
|
|
@ -95,7 +95,7 @@ Description: Allows the user to set the maximum clock frequency for MME, TPC
|
|||
What: /sys/class/habanalabs/hl<n>/ic_clk
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allows the user to set the maximum clock frequency, in Hz, of
|
||||
the Interconnect fabric. Writes to this parameter affect the
|
||||
device only when the power management profile is set to "manual"
|
||||
|
|
@ -107,27 +107,27 @@ Description: Allows the user to set the maximum clock frequency, in Hz, of
|
|||
What: /sys/class/habanalabs/hl<n>/ic_clk_curr
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the current clock frequency, in Hz, of the Interconnect
|
||||
fabric. This property is valid only for the Goya ASIC family
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/infineon_ver
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the Device's power supply F/W code
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/max_power
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allows the user to set the maximum power consumption of the
|
||||
device in milliwatts.
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/mme_clk
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allows the user to set the maximum clock frequency, in Hz, of
|
||||
the MME compute engine. Writes to this parameter affect the
|
||||
device only when the power management profile is set to "manual"
|
||||
|
|
@ -139,21 +139,21 @@ Description: Allows the user to set the maximum clock frequency, in Hz, of
|
|||
What: /sys/class/habanalabs/hl<n>/mme_clk_curr
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the current clock frequency, in Hz, of the MME compute
|
||||
engine. This property is valid only for the Goya ASIC family
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/pci_addr
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the PCI address of the device. This is needed so the
|
||||
user would be able to open a device based on its PCI address
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/pm_mng_profile
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Power management profile. Values are "auto", "manual". In "auto"
|
||||
mode, the driver will set the maximum clock frequency to a high
|
||||
value when a user-space process opens the device's file (unless
|
||||
|
|
@ -167,13 +167,13 @@ Description: Power management profile. Values are "auto", "manual". In "auto"
|
|||
What: /sys/class/habanalabs/hl<n>/preboot_btl_ver
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the device's preboot F/W code
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/soft_reset
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Interface to trigger a soft-reset operation for the device.
|
||||
Soft-reset will reset only the compute and DMA engines of the
|
||||
device
|
||||
|
|
@ -181,26 +181,26 @@ Description: Interface to trigger a soft-reset operation for the device.
|
|||
What: /sys/class/habanalabs/hl<n>/soft_reset_cnt
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays how many times the device have undergone a soft-reset
|
||||
operation since the driver was loaded
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/status
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Status of the card: "Operational", "Malfunction", "In reset".
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/thermal_ver
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the Device's thermal daemon
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/tpc_clk
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Allows the user to set the maximum clock frequency, in Hz, of
|
||||
the TPC compute engines. Writes to this parameter affect the
|
||||
device only when the power management profile is set to "manual"
|
||||
|
|
@ -212,12 +212,12 @@ Description: Allows the user to set the maximum clock frequency, in Hz, of
|
|||
What: /sys/class/habanalabs/hl<n>/tpc_clk_curr
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Displays the current clock frequency, in Hz, of the TPC compute
|
||||
engines. This property is valid only for the Goya ASIC family
|
||||
|
||||
What: /sys/class/habanalabs/hl<n>/uboot_ver
|
||||
Date: Jan 2019
|
||||
KernelVersion: 5.1
|
||||
Contact: oded.gabbay@gmail.com
|
||||
Contact: ogabbay@kernel.org
|
||||
Description: Version of the u-boot running on the device's CPU
|
||||
|
|
@ -1,15 +0,0 @@
|
|||
What: /sys/firmware/sfi/tables/
|
||||
Date: May 2010
|
||||
Contact: Len Brown <lenb@kernel.org>
|
||||
Description:
|
||||
SFI defines a number of small static memory tables
|
||||
so the kernel can get platform information from firmware.
|
||||
|
||||
The tables are defined in the latest SFI specification:
|
||||
http://simplefirmware.org/documentation
|
||||
|
||||
While the tables are used by the kernel, user-space
|
||||
can observe them this way::
|
||||
|
||||
# cd /sys/firmware/sfi/tables
|
||||
# cat $TABLENAME > $TABLENAME.bin
|
||||
|
|
@ -7,7 +7,7 @@ Description:
|
|||
is connected. example: "/dev/ttyS0".
|
||||
|
||||
The device name flows down to architecture specific board
|
||||
initialization file from the SFI/ATAGS bootloader
|
||||
initialization file from the ATAGS bootloader
|
||||
firmware. The name exposed is read from the user-space
|
||||
dameon and opens the device when install is requested.
|
||||
|
||||
|
|
|
|||
38
Documentation/PCI/endpoint/function/binding/pci-ntb.rst
Normal file
38
Documentation/PCI/endpoint/function/binding/pci-ntb.rst
Normal file
|
|
@ -0,0 +1,38 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
==========================
|
||||
PCI NTB Endpoint Function
|
||||
==========================
|
||||
|
||||
1) Create a subdirectory to pci_epf_ntb directory in configfs.
|
||||
|
||||
Standard EPF Configurable Fields:
|
||||
|
||||
================ ===========================================================
|
||||
vendorid should be 0x104c
|
||||
deviceid should be 0xb00d for TI's J721E SoC
|
||||
revid don't care
|
||||
progif_code don't care
|
||||
subclass_code should be 0x00
|
||||
baseclass_code should be 0x5
|
||||
cache_line_size don't care
|
||||
subsys_vendor_id don't care
|
||||
subsys_id don't care
|
||||
interrupt_pin don't care
|
||||
msi_interrupts don't care
|
||||
msix_interrupts don't care
|
||||
================ ===========================================================
|
||||
|
||||
2) Create a subdirectory to directory created in 1
|
||||
|
||||
NTB EPF specific configurable fields:
|
||||
|
||||
================ ===========================================================
|
||||
db_count Number of doorbells; default = 4
|
||||
mw1 size of memory window1
|
||||
mw2 size of memory window2
|
||||
mw3 size of memory window3
|
||||
mw4 size of memory window4
|
||||
num_mws Number of memory windows; max = 4
|
||||
spad_count Number of scratchpad registers; default = 64
|
||||
================ ===========================================================
|
||||
|
|
@ -11,5 +11,8 @@ PCI Endpoint Framework
|
|||
pci-endpoint-cfs
|
||||
pci-test-function
|
||||
pci-test-howto
|
||||
pci-ntb-function
|
||||
pci-ntb-howto
|
||||
|
||||
function/binding/pci-test
|
||||
function/binding/pci-ntb
|
||||
|
|
|
|||
|
|
@ -68,6 +68,16 @@ created)
|
|||
... subsys_vendor_id
|
||||
... subsys_id
|
||||
... interrupt_pin
|
||||
... primary/
|
||||
... <Symlink EPC Device1>/
|
||||
... secondary/
|
||||
... <Symlink EPC Device2>/
|
||||
|
||||
If an EPF device has to be associated with 2 EPCs (like in the case of
|
||||
Non-transparent bridge), symlink of endpoint controller connected to primary
|
||||
interface should be added in 'primary' directory and symlink of endpoint
|
||||
controller connected to secondary interface should be added in 'secondary'
|
||||
directory.
|
||||
|
||||
EPC Device
|
||||
==========
|
||||
|
|
|
|||
348
Documentation/PCI/endpoint/pci-ntb-function.rst
Normal file
348
Documentation/PCI/endpoint/pci-ntb-function.rst
Normal file
|
|
@ -0,0 +1,348 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
=================
|
||||
PCI NTB Function
|
||||
=================
|
||||
|
||||
:Author: Kishon Vijay Abraham I <kishon@ti.com>
|
||||
|
||||
PCI Non-Transparent Bridges (NTB) allow two host systems to communicate
|
||||
with each other by exposing each host as a device to the other host.
|
||||
NTBs typically support the ability to generate interrupts on the remote
|
||||
machine, expose memory ranges as BARs, and perform DMA. They also support
|
||||
scratchpads, which are areas of memory within the NTB that are accessible
|
||||
from both machines.
|
||||
|
||||
PCI NTB Function allows two different systems (or hosts) to communicate
|
||||
with each other by configuring the endpoint instances in such a way that
|
||||
transactions from one system are routed to the other system.
|
||||
|
||||
In the below diagram, PCI NTB function configures the SoC with multiple
|
||||
PCI Endpoint (EP) instances in such a way that transactions from one EP
|
||||
controller are routed to the other EP controller. Once PCI NTB function
|
||||
configures the SoC with multiple EP instances, HOST1 and HOST2 can
|
||||
communicate with each other using SoC as a bridge.
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
+-------------+ +-------------+
|
||||
| | | |
|
||||
| HOST1 | | HOST2 |
|
||||
| | | |
|
||||
+------^------+ +------^------+
|
||||
| |
|
||||
| |
|
||||
+---------|-------------------------------------------------|---------+
|
||||
| +------v------+ +------v------+ |
|
||||
| | | | | |
|
||||
| | EP | | EP | |
|
||||
| | CONTROLLER1 | | CONTROLLER2 | |
|
||||
| | <-----------------------------------> | |
|
||||
| | | | | |
|
||||
| | | | | |
|
||||
| | | SoC With Multiple EP Instances | | |
|
||||
| | | (Configured using NTB Function) | | |
|
||||
| +-------------+ +-------------+ |
|
||||
+---------------------------------------------------------------------+
|
||||
|
||||
Constructs used for Implementing NTB
|
||||
====================================
|
||||
|
||||
1) Config Region
|
||||
2) Self Scratchpad Registers
|
||||
3) Peer Scratchpad Registers
|
||||
4) Doorbell (DB) Registers
|
||||
5) Memory Window (MW)
|
||||
|
||||
|
||||
Config Region:
|
||||
--------------
|
||||
|
||||
Config Region is a construct that is specific to NTB implemented using NTB
|
||||
Endpoint Function Driver. The host and endpoint side NTB function driver will
|
||||
exchange information with each other using this region. Config Region has
|
||||
Control/Status Registers for configuring the Endpoint Controller. Host can
|
||||
write into this region for configuring the outbound Address Translation Unit
|
||||
(ATU) and to indicate the link status. Endpoint can indicate the status of
|
||||
commands issued by host in this region. Endpoint can also indicate the
|
||||
scratchpad offset and number of memory windows to the host using this region.
|
||||
|
||||
The format of Config Region is given below. All the fields here are 32 bits.
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
+------------------------+
|
||||
| COMMAND |
|
||||
+------------------------+
|
||||
| ARGUMENT |
|
||||
+------------------------+
|
||||
| STATUS |
|
||||
+------------------------+
|
||||
| TOPOLOGY |
|
||||
+------------------------+
|
||||
| ADDRESS (LOWER 32) |
|
||||
+------------------------+
|
||||
| ADDRESS (UPPER 32) |
|
||||
+------------------------+
|
||||
| SIZE |
|
||||
+------------------------+
|
||||
| NO OF MEMORY WINDOW |
|
||||
+------------------------+
|
||||
| MEMORY WINDOW1 OFFSET |
|
||||
+------------------------+
|
||||
| SPAD OFFSET |
|
||||
+------------------------+
|
||||
| SPAD COUNT |
|
||||
+------------------------+
|
||||
| DB ENTRY SIZE |
|
||||
+------------------------+
|
||||
| DB DATA |
|
||||
+------------------------+
|
||||
| : |
|
||||
+------------------------+
|
||||
| : |
|
||||
+------------------------+
|
||||
| DB DATA |
|
||||
+------------------------+
|
||||
|
||||
|
||||
COMMAND:
|
||||
|
||||
NTB function supports three commands:
|
||||
|
||||
CMD_CONFIGURE_DOORBELL (0x1): Command to configure doorbell. Before
|
||||
invoking this command, the host should allocate and initialize
|
||||
MSI/MSI-X vectors (i.e., initialize the MSI/MSI-X Capability in the
|
||||
Endpoint). The endpoint on receiving this command will configure
|
||||
the outbound ATU such that transactions to Doorbell BAR will be routed
|
||||
to the MSI/MSI-X address programmed by the host. The ARGUMENT
|
||||
register should be populated with number of DBs to configure (in the
|
||||
lower 16 bits) and if MSI or MSI-X should be configured (BIT 16).
|
||||
|
||||
CMD_CONFIGURE_MW (0x2): Command to configure memory window (MW). The
|
||||
host invokes this command after allocating a buffer that can be
|
||||
accessed by remote host. The allocated address should be programmed
|
||||
in the ADDRESS register (64 bit), the size should be programmed in
|
||||
the SIZE register and the memory window index should be programmed
|
||||
in the ARGUMENT register. The endpoint on receiving this command
|
||||
will configure the outbound ATU such that transactions to MW BAR
|
||||
are routed to the address provided by the host.
|
||||
|
||||
CMD_LINK_UP (0x3): Command to indicate an NTB application is
|
||||
bound to the EP device on the host side. Once the endpoint
|
||||
receives this command from both the hosts, the endpoint will
|
||||
raise a LINK_UP event to both the hosts to indicate the host
|
||||
NTB applications can start communicating with each other.
|
||||
|
||||
ARGUMENT:
|
||||
|
||||
The value of this register is based on the commands issued in
|
||||
command register. See COMMAND section for more information.
|
||||
|
||||
TOPOLOGY:
|
||||
|
||||
Set to NTB_TOPO_B2B_USD for Primary interface
|
||||
Set to NTB_TOPO_B2B_DSD for Secondary interface
|
||||
|
||||
ADDRESS/SIZE:
|
||||
|
||||
Address and Size to be used while configuring the memory window.
|
||||
See "CMD_CONFIGURE_MW" for more info.
|
||||
|
||||
MEMORY WINDOW1 OFFSET:
|
||||
|
||||
Memory Window 1 and Doorbell registers are packed together in the
|
||||
same BAR. The initial portion of the region will have doorbell
|
||||
registers and the latter portion of the region is for memory window 1.
|
||||
This register will specify the offset of the memory window 1.
|
||||
|
||||
NO OF MEMORY WINDOW:
|
||||
|
||||
Specifies the number of memory windows supported by the NTB device.
|
||||
|
||||
SPAD OFFSET:
|
||||
|
||||
Self scratchpad region and config region are packed together in the
|
||||
same BAR. The initial portion of the region will have config region
|
||||
and the latter portion of the region is for self scratchpad. This
|
||||
register will specify the offset of the self scratchpad registers.
|
||||
|
||||
SPAD COUNT:
|
||||
|
||||
Specifies the number of scratchpad registers supported by the NTB
|
||||
device.
|
||||
|
||||
DB ENTRY SIZE:
|
||||
|
||||
Used to determine the offset within the DB BAR that should be written
|
||||
in order to raise doorbell. EPF NTB can use either MSI or MSI-X to
|
||||
ring doorbell (MSI-X support will be added later). MSI uses same
|
||||
address for all the interrupts and MSI-X can provide different
|
||||
addresses for different interrupts. The MSI/MSI-X address is provided
|
||||
by the host and the address it gives is based on the MSI/MSI-X
|
||||
implementation supported by the host. For instance, ARM platform
|
||||
using GIC ITS will have the same MSI-X address for all the interrupts.
|
||||
In order to support all the combinations and use the same mechanism
|
||||
for both MSI and MSI-X, EPF NTB allocates a separate region in the
|
||||
Outbound Address Space for each of the interrupts. This region will
|
||||
be mapped to the MSI/MSI-X address provided by the host. If a host
|
||||
provides the same address for all the interrupts, all the regions
|
||||
will be translated to the same address. If a host provides different
|
||||
addresses, the regions will be translated to different addresses. This
|
||||
will ensure there is no difference while raising the doorbell.
|
||||
|
||||
DB DATA:
|
||||
|
||||
EPF NTB supports 32 interrupts, so there are 32 DB DATA registers.
|
||||
This holds the MSI/MSI-X data that has to be written to MSI address
|
||||
for raising doorbell interrupt. This will be populated by EPF NTB
|
||||
while invoking CMD_CONFIGURE_DOORBELL.
|
||||
|
||||
Scratchpad Registers:
|
||||
---------------------
|
||||
|
||||
Each host has its own register space allocated in the memory of NTB endpoint
|
||||
controller. They are both readable and writable from both sides of the bridge.
|
||||
They are used by applications built over NTB and can be used to pass control
|
||||
and status information between both sides of a device.
|
||||
|
||||
Scratchpad registers has 2 parts
|
||||
1) Self Scratchpad: Host's own register space
|
||||
2) Peer Scratchpad: Remote host's register space.
|
||||
|
||||
Doorbell Registers:
|
||||
-------------------
|
||||
|
||||
Doorbell Registers are used by the hosts to interrupt each other.
|
||||
|
||||
Memory Window:
|
||||
--------------
|
||||
|
||||
Actual transfer of data between the two hosts will happen using the
|
||||
memory window.
|
||||
|
||||
Modeling Constructs:
|
||||
====================
|
||||
|
||||
There are 5 or more distinct regions (config, self scratchpad, peer
|
||||
scratchpad, doorbell, one or more memory windows) to be modeled to achieve
|
||||
NTB functionality. At least one memory window is required while more than
|
||||
one is permitted. All these regions should be mapped to BARs for hosts to
|
||||
access these regions.
|
||||
|
||||
If one 32-bit BAR is allocated for each of these regions, the scheme would
|
||||
look like this:
|
||||
|
||||
====== ===============
|
||||
BAR NO CONSTRUCTS USED
|
||||
====== ===============
|
||||
BAR0 Config Region
|
||||
BAR1 Self Scratchpad
|
||||
BAR2 Peer Scratchpad
|
||||
BAR3 Doorbell
|
||||
BAR4 Memory Window 1
|
||||
BAR5 Memory Window 2
|
||||
====== ===============
|
||||
|
||||
However if we allocate a separate BAR for each of the regions, there would not
|
||||
be enough BARs for all the regions in a platform that supports only 64-bit
|
||||
BARs.
|
||||
|
||||
In order to be supported by most of the platforms, the regions should be
|
||||
packed and mapped to BARs in a way that provides NTB functionality and
|
||||
also makes sure the host doesn't access any region that it is not supposed
|
||||
to.
|
||||
|
||||
The following scheme is used in EPF NTB Function:
|
||||
|
||||
====== ===============================
|
||||
BAR NO CONSTRUCTS USED
|
||||
====== ===============================
|
||||
BAR0 Config Region + Self Scratchpad
|
||||
BAR1 Peer Scratchpad
|
||||
BAR2 Doorbell + Memory Window 1
|
||||
BAR3 Memory Window 2
|
||||
BAR4 Memory Window 3
|
||||
BAR5 Memory Window 4
|
||||
====== ===============================
|
||||
|
||||
With this scheme, for the basic NTB functionality 3 BARs should be sufficient.
|
||||
|
||||
Modeling Config/Scratchpad Region:
|
||||
----------------------------------
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
+-----------------+------->+------------------+ +-----------------+
|
||||
| BAR0 | | CONFIG REGION | | BAR0 |
|
||||
+-----------------+----+ +------------------+<-------+-----------------+
|
||||
| BAR1 | | |SCRATCHPAD REGION | | BAR1 |
|
||||
+-----------------+ +-->+------------------+<-------+-----------------+
|
||||
| BAR2 | Local Memory | BAR2 |
|
||||
+-----------------+ +-----------------+
|
||||
| BAR3 | | BAR3 |
|
||||
+-----------------+ +-----------------+
|
||||
| BAR4 | | BAR4 |
|
||||
+-----------------+ +-----------------+
|
||||
| BAR5 | | BAR5 |
|
||||
+-----------------+ +-----------------+
|
||||
EP CONTROLLER 1 EP CONTROLLER 2
|
||||
|
||||
Above diagram shows Config region + Scratchpad region for HOST1 (connected to
|
||||
EP controller 1) allocated in local memory. The HOST1 can access the config
|
||||
region and scratchpad region (self scratchpad) using BAR0 of EP controller 1.
|
||||
The peer host (HOST2 connected to EP controller 2) can also access this
|
||||
scratchpad region (peer scratchpad) using BAR1 of EP controller 2. This
|
||||
diagram shows the case where Config region and Scratchpad regions are allocated
|
||||
for HOST1, however the same is applicable for HOST2.
|
||||
|
||||
Modeling Doorbell/Memory Window 1:
|
||||
----------------------------------
|
||||
|
||||
.. code-block:: text
|
||||
|
||||
+-----------------+ +----->+----------------+-----------+-----------------+
|
||||
| BAR0 | | | Doorbell 1 +-----------> MSI-X ADDRESS 1 |
|
||||
+-----------------+ | +----------------+ +-----------------+
|
||||
| BAR1 | | | Doorbell 2 +---------+ | |
|
||||
+-----------------+----+ +----------------+ | | |
|
||||
| BAR2 | | Doorbell 3 +-------+ | +-----------------+
|
||||
+-----------------+----+ +----------------+ | +-> MSI-X ADDRESS 2 |
|
||||
| BAR3 | | | Doorbell 4 +-----+ | +-----------------+
|
||||
+-----------------+ | |----------------+ | | | |
|
||||
| BAR4 | | | | | | +-----------------+
|
||||
+-----------------+ | | MW1 +---+ | +-->+ MSI-X ADDRESS 3||
|
||||
| BAR5 | | | | | | +-----------------+
|
||||
+-----------------+ +----->-----------------+ | | | |
|
||||
EP CONTROLLER 1 | | | | +-----------------+
|
||||
| | | +---->+ MSI-X ADDRESS 4 |
|
||||
+----------------+ | +-----------------+
|
||||
EP CONTROLLER 2 | | |
|
||||
(OB SPACE) | | |
|
||||
+-------> MW1 |
|
||||
| |
|
||||
| |
|
||||
+-----------------+
|
||||
| |
|
||||
| |
|
||||
| |
|
||||
| |
|
||||
| |
|
||||
+-----------------+
|
||||
PCI Address Space
|
||||
(Managed by HOST2)
|
||||
|
||||
Above diagram shows how the doorbell and memory window 1 is mapped so that
|
||||
HOST1 can raise doorbell interrupt on HOST2 and also how HOST1 can access
|
||||
buffers exposed by HOST2 using memory window1 (MW1). Here doorbell and
|
||||
memory window 1 regions are allocated in EP controller 2 outbound (OB) address
|
||||
space. Allocating and configuring BARs for doorbell and memory window1
|
||||
is done during the initialization phase of NTB endpoint function driver.
|
||||
Mapping from EP controller 2 OB space to PCI address space is done when HOST2
|
||||
sends CMD_CONFIGURE_MW/CMD_CONFIGURE_DOORBELL.
|
||||
|
||||
Modeling Optional Memory Windows:
|
||||
---------------------------------
|
||||
|
||||
This is modeled the same was as MW1 but each of the additional memory windows
|
||||
is mapped to separate BARs.
|
||||
161
Documentation/PCI/endpoint/pci-ntb-howto.rst
Normal file
161
Documentation/PCI/endpoint/pci-ntb-howto.rst
Normal file
|
|
@ -0,0 +1,161 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
===================================================================
|
||||
PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide
|
||||
===================================================================
|
||||
|
||||
:Author: Kishon Vijay Abraham I <kishon@ti.com>
|
||||
|
||||
This document is a guide to help users use pci-epf-ntb function driver
|
||||
and ntb_hw_epf host driver for NTB functionality. The list of steps to
|
||||
be followed in the host side and EP side is given below. For the hardware
|
||||
configuration and internals of NTB using configurable endpoints see
|
||||
Documentation/PCI/endpoint/pci-ntb-function.rst
|
||||
|
||||
Endpoint Device
|
||||
===============
|
||||
|
||||
Endpoint Controller Devices
|
||||
---------------------------
|
||||
|
||||
For implementing NTB functionality at least two endpoint controller devices
|
||||
are required.
|
||||
|
||||
To find the list of endpoint controller devices in the system::
|
||||
|
||||
# ls /sys/class/pci_epc/
|
||||
2900000.pcie-ep 2910000.pcie-ep
|
||||
|
||||
If PCI_ENDPOINT_CONFIGFS is enabled::
|
||||
|
||||
# ls /sys/kernel/config/pci_ep/controllers
|
||||
2900000.pcie-ep 2910000.pcie-ep
|
||||
|
||||
|
||||
Endpoint Function Drivers
|
||||
-------------------------
|
||||
|
||||
To find the list of endpoint function drivers in the system::
|
||||
|
||||
# ls /sys/bus/pci-epf/drivers
|
||||
pci_epf_ntb pci_epf_ntb
|
||||
|
||||
If PCI_ENDPOINT_CONFIGFS is enabled::
|
||||
|
||||
# ls /sys/kernel/config/pci_ep/functions
|
||||
pci_epf_ntb pci_epf_ntb
|
||||
|
||||
|
||||
Creating pci-epf-ntb Device
|
||||
----------------------------
|
||||
|
||||
PCI endpoint function device can be created using the configfs. To create
|
||||
pci-epf-ntb device, the following commands can be used::
|
||||
|
||||
# mount -t configfs none /sys/kernel/config
|
||||
# cd /sys/kernel/config/pci_ep/
|
||||
# mkdir functions/pci_epf_ntb/func1
|
||||
|
||||
The "mkdir func1" above creates the pci-epf-ntb function device that will
|
||||
be probed by pci_epf_ntb driver.
|
||||
|
||||
The PCI endpoint framework populates the directory with the following
|
||||
configurable fields::
|
||||
|
||||
# ls functions/pci_epf_ntb/func1
|
||||
baseclass_code deviceid msi_interrupts pci-epf-ntb.0
|
||||
progif_code secondary subsys_id vendorid
|
||||
cache_line_size interrupt_pin msix_interrupts primary
|
||||
revid subclass_code subsys_vendor_id
|
||||
|
||||
The PCI endpoint function driver populates these entries with default values
|
||||
when the device is bound to the driver. The pci-epf-ntb driver populates
|
||||
vendorid with 0xffff and interrupt_pin with 0x0001::
|
||||
|
||||
# cat functions/pci_epf_ntb/func1/vendorid
|
||||
0xffff
|
||||
# cat functions/pci_epf_ntb/func1/interrupt_pin
|
||||
0x0001
|
||||
|
||||
|
||||
Configuring pci-epf-ntb Device
|
||||
-------------------------------
|
||||
|
||||
The user can configure the pci-epf-ntb device using its configfs entry. In order
|
||||
to change the vendorid and the deviceid, the following
|
||||
commands can be used::
|
||||
|
||||
# echo 0x104c > functions/pci_epf_ntb/func1/vendorid
|
||||
# echo 0xb00d > functions/pci_epf_ntb/func1/deviceid
|
||||
|
||||
In order to configure NTB specific attributes, a new sub-directory to func1
|
||||
should be created::
|
||||
|
||||
# mkdir functions/pci_epf_ntb/func1/pci_epf_ntb.0/
|
||||
|
||||
The NTB function driver will populate this directory with various attributes
|
||||
that can be configured by the user::
|
||||
|
||||
# ls functions/pci_epf_ntb/func1/pci_epf_ntb.0/
|
||||
db_count mw1 mw2 mw3 mw4 num_mws
|
||||
spad_count
|
||||
|
||||
A sample configuration for NTB function is given below::
|
||||
|
||||
# echo 4 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/db_count
|
||||
# echo 128 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/spad_count
|
||||
# echo 2 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/num_mws
|
||||
# echo 0x100000 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/mw1
|
||||
# echo 0x100000 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/mw2
|
||||
|
||||
Binding pci-epf-ntb Device to EP Controller
|
||||
--------------------------------------------
|
||||
|
||||
NTB function device should be attached to two PCI endpoint controllers
|
||||
connected to the two hosts. Use the 'primary' and 'secondary' entries
|
||||
inside NTB function device to attach one PCI endpoint controller to
|
||||
primary interface and the other PCI endpoint controller to the secondary
|
||||
interface::
|
||||
|
||||
# ln -s controllers/2900000.pcie-ep/ functions/pci-epf-ntb/func1/primary
|
||||
# ln -s controllers/2910000.pcie-ep/ functions/pci-epf-ntb/func1/secondary
|
||||
|
||||
Once the above step is completed, both the PCI endpoint controllers are ready to
|
||||
establish a link with the host.
|
||||
|
||||
|
||||
Start the Link
|
||||
--------------
|
||||
|
||||
In order for the endpoint device to establish a link with the host, the _start_
|
||||
field should be populated with '1'. For NTB, both the PCI endpoint controllers
|
||||
should establish link with the host::
|
||||
|
||||
# echo 1 > controllers/2900000.pcie-ep/start
|
||||
# echo 1 > controllers/2910000.pcie-ep/start
|
||||
|
||||
|
||||
RootComplex Device
|
||||
==================
|
||||
|
||||
lspci Output
|
||||
------------
|
||||
|
||||
Note that the devices listed here correspond to the values populated in
|
||||
"Creating pci-epf-ntb Device" section above::
|
||||
|
||||
# lspci
|
||||
0000:00:00.0 PCI bridge: Texas Instruments Device b00d
|
||||
0000:01:00.0 RAM memory: Texas Instruments Device b00d
|
||||
|
||||
|
||||
Using ntb_hw_epf Device
|
||||
-----------------------
|
||||
|
||||
The host side software follows the standard NTB software architecture in Linux.
|
||||
All the existing client side NTB utilities like NTB Transport Client and NTB
|
||||
Netdev, NTB Ping Pong Test Client and NTB Tool Test Client can be used with NTB
|
||||
function device.
|
||||
|
||||
For more information on NTB see
|
||||
:doc:`Non-Transparent Bridge <../../driver-api/ntb>`
|
||||
|
|
@ -1299,6 +1299,10 @@ PAGE_SIZE multiple when read back.
|
|||
Amount of cached filesystem data that was modified and
|
||||
is currently being written back to disk
|
||||
|
||||
swapcached
|
||||
Amount of swap cached in memory. The swapcache is accounted
|
||||
against both memory and swap usage.
|
||||
|
||||
anon_thp
|
||||
Amount of memory used in anonymous mappings backed by
|
||||
transparent hugepages
|
||||
|
|
|
|||
|
|
@ -4908,14 +4908,6 @@
|
|||
last alloc / free. For more information see
|
||||
Documentation/vm/slub.rst.
|
||||
|
||||
slub_memcg_sysfs= [MM, SLUB]
|
||||
Determines whether to enable sysfs directories for
|
||||
memory cgroup sub-caches. 1 to enable, 0 to disable.
|
||||
The default is determined by CONFIG_SLUB_MEMCG_SYSFS_ON.
|
||||
Enabling this can lead to a very high number of debug
|
||||
directories and files being created under
|
||||
/sys/kernel/slub.
|
||||
|
||||
slub_max_order= [MM, SLUB]
|
||||
Determines the maximum allowed order for slabs.
|
||||
A high setting may cause OOMs due to memory
|
||||
|
|
@ -5994,12 +5986,6 @@
|
|||
default x2apic cluster mode on platforms
|
||||
supporting x2apic.
|
||||
|
||||
x86_intel_mid_timer= [X86-32,APBT]
|
||||
Choose timer option for x86 Intel MID platform.
|
||||
Two valid options are apbt timer only and lapic timer
|
||||
plus one apbt timer for broadcast timer.
|
||||
x86_intel_mid_timer=apbt_only | lapic_and_apbt
|
||||
|
||||
xen_512gb_limit [KNL,X86-64,XEN]
|
||||
Restricts the kernel running paravirtualized under Xen
|
||||
to use only up to 512 GB of RAM. The reason to do so is
|
||||
|
|
|
|||
|
|
@ -1033,7 +1033,9 @@ speakup + keypad 3, you would hear:
|
|||
The speakup key is depressed, so the name of the key state is speakup.
|
||||
This part of the message comes from the states collection.
|
||||
|
||||
14.2. Loading Your Own Messages
|
||||
14.2. Changing language
|
||||
|
||||
14.2.1. Loading Your Own Messages
|
||||
|
||||
The files under the i18n subdirectory all follow the same format.
|
||||
They consist of lines, with one message per line.
|
||||
|
|
@ -1066,8 +1068,50 @@ echo '1 azul' > /speakup/i18n/colors
|
|||
The next time that Speakup says message 1 from the colors group, it will
|
||||
say "azul", rather than "blue."
|
||||
|
||||
14.2.2. Choose a language
|
||||
|
||||
In the future, translations into various languages will be made available,
|
||||
and most users will just load the files necessary for their language.
|
||||
and most users will just load the files necessary for their language. So far,
|
||||
only French language is available beyond native Canadian English language.
|
||||
|
||||
French is only available after you are logged in.
|
||||
|
||||
Canadian English is the default language. To toggle another language,
|
||||
download the source of Speakup and untar it in your home directory. The
|
||||
following command should let you do this:
|
||||
|
||||
tar xvjf speakup-<version>.tar.bz2
|
||||
|
||||
where <version> is the version number of the application.
|
||||
|
||||
Next, change to the newly created directory, then into the tools/ directory, and
|
||||
run the script speakup_setlocale. You are asked the language that you want to
|
||||
use. Type the number associated to your language (e.g. fr for French) then press
|
||||
Enter. Needed files are copied in the i18n directory.
|
||||
|
||||
Note: the speakupconf must be installed on your system so that settings are saved.
|
||||
Otherwise, you will have an error: your language will be loaded but you will
|
||||
have to run the script again every time Speakup restarts.
|
||||
See section 16.1. for information about speakupconf.
|
||||
|
||||
You will have to repeat these steps for any change of locale, i.e. if you wish
|
||||
change the speakup's language or charset (iso-8859-15 ou UTF-8).
|
||||
|
||||
If you wish store the settings, note that at your next login, you will need to
|
||||
do:
|
||||
|
||||
speakup load
|
||||
|
||||
Alternatively, you can add the above line to your file
|
||||
~/.bashrc or ~/.bash_profile.
|
||||
|
||||
If your system administrator ran himself the script, all the users will be able
|
||||
to change from English to the language choosed by root and do directly
|
||||
speakupconf load (or add this to the ~/.bashrc or
|
||||
~/.bash_profile file). If there are several languages to handle, the
|
||||
administrator (or every user) will have to run the first steps until speakupconf
|
||||
save, choosing the appropriate language, in every user's home directory. Every
|
||||
user will then be able to do speakupconf load, Speakup will load his own settings.
|
||||
|
||||
14.3. No Support for Non-Western-European Languages
|
||||
|
||||
|
|
|
|||
|
|
@ -999,11 +999,11 @@ that benefit from having their data cached, zone_reclaim_mode should be
|
|||
left disabled as the caching effect is likely to be more important than
|
||||
data locality.
|
||||
|
||||
zone_reclaim may be enabled if it's known that the workload is partitioned
|
||||
such that each partition fits within a NUMA node and that accessing remote
|
||||
memory would cause a measurable performance reduction. The page allocator
|
||||
will then reclaim easily reusable pages (those page cache pages that are
|
||||
currently not used) before allocating off node pages.
|
||||
Consider enabling one or more zone_reclaim mode bits if it's known that the
|
||||
workload is partitioned such that each partition fits within a NUMA node
|
||||
and that accessing remote memory would cause a measurable performance
|
||||
reduction. The page allocator will take additional actions before
|
||||
allocating off node pages.
|
||||
|
||||
Allowing zone reclaim to write out pages stops processes that are
|
||||
writing large amounts of data from dirtying pages on other nodes. Zone
|
||||
|
|
|
|||
|
|
@ -19,11 +19,8 @@ User Space Memory Access
|
|||
Memory Allocation Controls
|
||||
==========================
|
||||
|
||||
Functions which need to allocate memory often use GFP flags to express
|
||||
how that memory should be allocated. The GFP acronym stands for "get
|
||||
free pages", the underlying memory allocation function. Not every GFP
|
||||
flag is allowed to every function which may allocate memory. Most
|
||||
users will want to use a plain ``GFP_KERNEL``.
|
||||
.. kernel-doc:: include/linux/gfp.h
|
||||
:internal:
|
||||
|
||||
.. kernel-doc:: include/linux/gfp.h
|
||||
:doc: Page mobility and placement hints
|
||||
|
|
|
|||
|
|
@ -147,15 +147,14 @@ negative values to distinguish between different kinds of inaccessible memory
|
|||
like redzones or freed memory (see mm/kasan/kasan.h).
|
||||
|
||||
In the report above the arrows point to the shadow byte 03, which means that
|
||||
the accessed address is partially accessible.
|
||||
|
||||
For tag-based KASAN this last report section shows the memory tags around the
|
||||
accessed address (see `Implementation details`_ section).
|
||||
the accessed address is partially accessible. For tag-based KASAN modes this
|
||||
last report section shows the memory tags around the accessed address
|
||||
(see the `Implementation details`_ section).
|
||||
|
||||
Boot parameters
|
||||
~~~~~~~~~~~~~~~
|
||||
|
||||
Hardware tag-based KASAN mode (see the section about different mode below) is
|
||||
Hardware tag-based KASAN mode (see the section about various modes below) is
|
||||
intended for use in production as a security mitigation. Therefore it supports
|
||||
boot parameters that allow to disable KASAN competely or otherwise control
|
||||
particular KASAN features.
|
||||
|
|
@ -289,6 +288,13 @@ reserved to tag freed memory regions.
|
|||
Hardware tag-based KASAN currently only supports tagging of
|
||||
kmem_cache_alloc/kmalloc and page_alloc memory.
|
||||
|
||||
If the hardware doesn't support MTE (pre ARMv8.5), hardware tag-based KASAN
|
||||
won't be enabled. In this case all boot parameters are ignored.
|
||||
|
||||
Note, that enabling CONFIG_KASAN_HW_TAGS always results in in-kernel TBI being
|
||||
enabled. Even when kasan.mode=off is provided, or when the hardware doesn't
|
||||
support MTE (but supports TBI).
|
||||
|
||||
What memory accesses are sanitised by KASAN?
|
||||
--------------------------------------------
|
||||
|
||||
|
|
@ -352,17 +358,17 @@ unmapped. This will require changes in arch-specific code.
|
|||
This allows ``VMAP_STACK`` support on x86, and can simplify support of
|
||||
architectures that do not have a fixed module region.
|
||||
|
||||
CONFIG_KASAN_KUNIT_TEST & CONFIG_TEST_KASAN_MODULE
|
||||
--------------------------------------------------
|
||||
CONFIG_KASAN_KUNIT_TEST and CONFIG_KASAN_MODULE_TEST
|
||||
----------------------------------------------------
|
||||
|
||||
KASAN tests consist on two parts:
|
||||
KASAN tests consist of two parts:
|
||||
|
||||
1. Tests that are integrated with the KUnit Test Framework. Enabled with
|
||||
``CONFIG_KASAN_KUNIT_TEST``. These tests can be run and partially verified
|
||||
automatically in a few different ways, see the instructions below.
|
||||
|
||||
2. Tests that are currently incompatible with KUnit. Enabled with
|
||||
``CONFIG_TEST_KASAN_MODULE`` and can only be run as a module. These tests can
|
||||
``CONFIG_KASAN_MODULE_TEST`` and can only be run as a module. These tests can
|
||||
only be verified manually, by loading the kernel module and inspecting the
|
||||
kernel log for KASAN reports.
|
||||
|
||||
|
|
|
|||
|
|
@ -34,9 +34,12 @@ its hardware characteristcs.
|
|||
Program Flow Trace Macrocell:
|
||||
"arm,coresight-etm3x", "arm,primecell";
|
||||
|
||||
- Embedded Trace Macrocell (version 4.x):
|
||||
- Embedded Trace Macrocell (version 4.x), with memory mapped access.
|
||||
"arm,coresight-etm4x", "arm,primecell";
|
||||
|
||||
- Embedded Trace Macrocell (version 4.x), with system register access only.
|
||||
"arm,coresight-etm4x-sysreg";
|
||||
|
||||
- Coresight programmable Replicator :
|
||||
"arm,coresight-dynamic-replicator", "arm,primecell";
|
||||
|
||||
|
|
|
|||
|
|
@ -132,6 +132,7 @@ properties:
|
|||
- enum:
|
||||
- friendlyarm,nanopc-t4
|
||||
- friendlyarm,nanopi-m4
|
||||
- friendlyarm,nanopi-m4b
|
||||
- friendlyarm,nanopi-neo4
|
||||
- const: rockchip,rk3399
|
||||
|
||||
|
|
|
|||
|
|
@ -22,23 +22,7 @@ Required properties:
|
|||
MIPI TX Configuration Module
|
||||
============================
|
||||
|
||||
The MIPI TX configuration module controls the MIPI D-PHY.
|
||||
|
||||
Required properties:
|
||||
- compatible: "mediatek,<chip>-mipi-tx"
|
||||
- the supported chips are mt2701, 7623, mt8173 and mt8183.
|
||||
- reg: Physical base address and length of the controller's registers
|
||||
- clocks: PLL reference clock
|
||||
- clock-output-names: name of the output clock line to the DSI encoder
|
||||
- #clock-cells: must be <0>;
|
||||
- #phy-cells: must be <0>.
|
||||
|
||||
Optional properties:
|
||||
- drive-strength-microamp: adjust driving current, should be 3000 ~ 6000. And
|
||||
the step is 200.
|
||||
- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If
|
||||
unspecified default values shall be used.
|
||||
- nvmem-cell-names: Should be "calibration-data"
|
||||
See phy/mediatek,dsi-phy.yaml
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -53,23 +53,7 @@ Required properties:
|
|||
|
||||
HDMI PHY
|
||||
========
|
||||
|
||||
The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
|
||||
output and drives the HDMI pads.
|
||||
|
||||
Required properties:
|
||||
- compatible: "mediatek,<chip>-hdmi-phy"
|
||||
- the supported chips are mt2701, mt7623 and mt8173
|
||||
- reg: Physical base address and length of the module's registers
|
||||
- clocks: PLL reference clock
|
||||
- clock-names: must contain "pll_ref"
|
||||
- clock-output-names: must be "hdmitx_dig_cts" on mt8173
|
||||
- #phy-cells: must be <0>
|
||||
- #clock-cells: must be <0>
|
||||
|
||||
Optional properties:
|
||||
- mediatek,ibias: TX DRV bias current for <1.65Gbps, defaults to 0xa
|
||||
- mediatek,ibias_up: TX DRV bias current for >1.65Gbps, defaults to 0x1c
|
||||
See phy/mediatek,hdmi-phy.yaml
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@ properties:
|
|||
compatible:
|
||||
enum:
|
||||
- ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
|
||||
- ti,am64-hwspinlock # for K3 AM64x SoCs
|
||||
- ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs
|
||||
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -1,77 +0,0 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,qcs404.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm QCS404 Network-On-Chip interconnect
|
||||
|
||||
maintainers:
|
||||
- Georgi Djakov <georgi.djakov@linaro.org>
|
||||
|
||||
description: |
|
||||
The Qualcomm QCS404 interconnect providers support adjusting the
|
||||
bandwidth requirements between the various NoC fabrics.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,qcs404-bimc
|
||||
- qcom,qcs404-pcnoc
|
||||
- qcom,qcs404-snoc
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: bus_a
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Bus Clock
|
||||
- description: Bus A Clock
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- '#interconnect-cells'
|
||||
- clock-names
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||
|
||||
bimc: interconnect@400000 {
|
||||
reg = <0x00400000 0x80000>;
|
||||
compatible = "qcom,qcs404-bimc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
|
||||
<&rpmcc RPM_SMD_BIMC_A_CLK>;
|
||||
};
|
||||
|
||||
pnoc: interconnect@500000 {
|
||||
reg = <0x00500000 0x15080>;
|
||||
compatible = "qcom,qcs404-pcnoc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_PNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_PNOC_A_CLK>;
|
||||
};
|
||||
|
||||
snoc: interconnect@580000 {
|
||||
reg = <0x00580000 0x23080>;
|
||||
compatible = "qcom,qcs404-snoc";
|
||||
#interconnect-cells = <1>;
|
||||
clock-names = "bus", "bus_a";
|
||||
clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
|
||||
<&rpmcc RPM_SMD_SNOC_A_CLK>;
|
||||
};
|
||||
|
|
@ -1,27 +1,35 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,msm8916.yaml#
|
||||
$id: http://devicetree.org/schemas/interconnect/qcom,rpm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm MSM8916 Network-On-Chip interconnect
|
||||
title: Qualcomm RPM Network-On-Chip Interconnect
|
||||
|
||||
maintainers:
|
||||
- Georgi Djakov <georgi.djakov@linaro.org>
|
||||
|
||||
description: |
|
||||
The Qualcomm MSM8916 interconnect providers support adjusting the
|
||||
bandwidth requirements between the various NoC fabrics.
|
||||
RPM interconnect providers support system bandwidth requirements through
|
||||
RPM processor. The provider is able to communicate with the RPM through
|
||||
the RPM shared memory device.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,msm8916-bimc
|
||||
- qcom,msm8916-pcnoc
|
||||
- qcom,msm8916-snoc
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
- qcom,msm8939-bimc
|
||||
- qcom,msm8939-pcnoc
|
||||
- qcom,msm8939-snoc
|
||||
- qcom,msm8939-snoc-mm
|
||||
- qcom,qcs404-bimc
|
||||
- qcom,qcs404-pcnoc
|
||||
- qcom,qcs404-snoc
|
||||
|
||||
'#interconnect-cells':
|
||||
const: 1
|
||||
|
|
@ -45,6 +45,10 @@ properties:
|
|||
- qcom,sdm845-mem-noc
|
||||
- qcom,sdm845-mmss-noc
|
||||
- qcom,sdm845-system-noc
|
||||
- qcom,sdx55-ipa-virt
|
||||
- qcom,sdx55-mc-virt
|
||||
- qcom,sdx55-mem-noc
|
||||
- qcom,sdx55-system-noc
|
||||
- qcom,sm8150-aggre1-noc
|
||||
- qcom,sm8150-aggre2-noc
|
||||
- qcom,sm8150-camnoc-noc
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@ Required properties:
|
|||
- compatible : shall be one of:
|
||||
"atmel,at93c46d"
|
||||
"eeprom-93xx46"
|
||||
"microchip,93lc46b"
|
||||
- data-size : number of data bits per word (either 8 or 16)
|
||||
|
||||
Optional properties:
|
||||
|
|
|
|||
49
Documentation/devicetree/bindings/nvmem/rmem.yaml
Normal file
49
Documentation/devicetree/bindings/nvmem/rmem.yaml
Normal file
|
|
@ -0,0 +1,49 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/nvmem/rmem.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Reserved Memory Based nvmem Device
|
||||
|
||||
maintainers:
|
||||
- Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
|
||||
|
||||
allOf:
|
||||
- $ref: "nvmem.yaml#"
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- raspberrypi,bootloader-config
|
||||
- const: nvmem-rmem
|
||||
|
||||
no-map:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
Avoid creating a virtual mapping of the region as part of the OS'
|
||||
standard mapping of system memory.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- no-map
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
blconfig: nvram@10000000 {
|
||||
compatible = "raspberrypi,bootloader-config", "nvmem-rmem";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x10000000 0x1000>;
|
||||
no-map;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -14,6 +14,7 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- brcm,bcm2711-pcie # The Raspberry Pi 4
|
||||
- brcm,bcm4908-pcie
|
||||
- brcm,bcm7211-pcie # Broadcom STB version of RPi4
|
||||
- brcm,bcm7278-pcie # Broadcom 7278 Arm
|
||||
- brcm,bcm7216-pcie # Broadcom 7216 Arm
|
||||
|
|
@ -63,15 +64,6 @@ properties:
|
|||
|
||||
aspm-no-l0s: true
|
||||
|
||||
resets:
|
||||
description: for "brcm,bcm7216-pcie", must be a valid reset
|
||||
phandle pointing to the RESCAL reset controller provider node.
|
||||
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: rescal
|
||||
|
||||
brcm,scb-sizes:
|
||||
description: u64 giving the 64bit PCIe memory
|
||||
viewport size of a memory controller. There may be up to
|
||||
|
|
@ -98,12 +90,39 @@ required:
|
|||
|
||||
allOf:
|
||||
- $ref: /schemas/pci/pci-bus.yaml#
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: brcm,bcm4908-pcie
|
||||
then:
|
||||
properties:
|
||||
resets:
|
||||
items:
|
||||
- description: reset controller handling the PERST# signal
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: perst
|
||||
|
||||
required:
|
||||
- resets
|
||||
- reset-names
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: brcm,bcm7216-pcie
|
||||
then:
|
||||
properties:
|
||||
resets:
|
||||
items:
|
||||
- description: phandle pointing to the RESCAL reset controller
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: rescal
|
||||
|
||||
required:
|
||||
- resets
|
||||
- reset-names
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@ Required properties:
|
|||
"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
|
||||
"fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep"
|
||||
"fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep"
|
||||
"fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"
|
||||
- reg: base addresses and lengths of the PCIe controller register blocks.
|
||||
- interrupts: A list of interrupt outputs of the controller. Must contain an
|
||||
entry for each entry in the interrupt-names property.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,92 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/pci/microchip,pcie-host.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Microchip PCIe Root Port Bridge Controller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Daire McNamara <daire.mcnamara@microchip.com>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/pci/pci-bus.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: microchip,pcie-host-1.0 # PolarFire
|
||||
|
||||
reg:
|
||||
maxItems: 2
|
||||
|
||||
reg-names:
|
||||
items:
|
||||
- const: cfg
|
||||
- const: apb
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- description: PCIe host controller
|
||||
- description: builtin MSI controller
|
||||
|
||||
interrupt-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- const: pcie
|
||||
- const: msi
|
||||
|
||||
ranges:
|
||||
maxItems: 1
|
||||
|
||||
msi-controller:
|
||||
description: Identifies the node as an MSI controller.
|
||||
|
||||
msi-parent:
|
||||
description: MSI controller the device is capable of using.
|
||||
|
||||
required:
|
||||
- reg
|
||||
- reg-names
|
||||
- "#interrupt-cells"
|
||||
- interrupts
|
||||
- interrupt-map-mask
|
||||
- interrupt-map
|
||||
- msi-controller
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
pcie0: pcie@2030000000 {
|
||||
compatible = "microchip,pcie-host-1.0";
|
||||
reg = <0x0 0x70000000 0x0 0x08000000>,
|
||||
<0x0 0x43000000 0x0 0x00010000>;
|
||||
reg-names = "cfg", "apb";
|
||||
device_type = "pci";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupts = <119>;
|
||||
interrupt-map-mask = <0x0 0x0 0x0 0x7>;
|
||||
interrupt-map = <0 0 0 1 &pcie_intc0 0>,
|
||||
<0 0 0 2 &pcie_intc0 1>,
|
||||
<0 0 0 3 &pcie_intc0 2>,
|
||||
<0 0 0 4 &pcie_intc0 3>;
|
||||
interrupt-parent = <&plic0>;
|
||||
msi-parent = <&pcie0>;
|
||||
msi-controller;
|
||||
bus-range = <0x00 0x7f>;
|
||||
ranges = <0x03000000 0x0 0x78000000 0x0 0x78000000 0x0 0x04000000>;
|
||||
pcie_intc0: interrupt-controller {
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -132,8 +132,8 @@
|
|||
- "master_bus" AXI Master clock
|
||||
- "slave_bus" AXI Slave clock
|
||||
|
||||
-clock-names:
|
||||
Usage: required for sdm845 and sm8250
|
||||
- clock-names:
|
||||
Usage: required for sdm845
|
||||
Value type: <stringlist>
|
||||
Definition: Should contain the following entries
|
||||
- "aux" Auxiliary clock
|
||||
|
|
@ -144,6 +144,19 @@
|
|||
- "tbu" PCIe TBU clock
|
||||
- "pipe" PIPE clock
|
||||
|
||||
- clock-names:
|
||||
Usage: required for sm8250
|
||||
Value type: <stringlist>
|
||||
Definition: Should contain the following entries
|
||||
- "aux" Auxiliary clock
|
||||
- "cfg" Configuration clock
|
||||
- "bus_master" Master AXI clock
|
||||
- "bus_slave" Slave AXI clock
|
||||
- "slave_q2a" Slave Q2A clock
|
||||
- "tbu" PCIe TBU clock
|
||||
- "ddrss_sf_tbu" PCIe SF TBU clock
|
||||
- "pipe" PIPE clock
|
||||
|
||||
- resets:
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
|
|
|
|||
|
|
@ -1,86 +0,0 @@
|
|||
Broadcom STB USB PHY
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of
|
||||
"brcm,brcmstb-usb-phy"
|
||||
"brcm,bcm7216-usb-phy"
|
||||
"brcm,bcm7211-usb-phy"
|
||||
|
||||
- reg and reg-names properties requirements are specific to the
|
||||
compatible string.
|
||||
"brcm,brcmstb-usb-phy":
|
||||
- reg: 1 or 2 offset and length pairs. One for the base CTRL registers
|
||||
and an optional pair for systems with USB 3.x support
|
||||
- reg-names: not specified
|
||||
"brcm,bcm7216-usb-phy":
|
||||
- reg: 3 offset and length pairs for CTRL, XHCI_EC and XHCI_GBL
|
||||
registers
|
||||
- reg-names: "ctrl", "xhci_ec", "xhci_gbl"
|
||||
"brcm,bcm7211-usb-phy":
|
||||
- reg: 5 offset and length pairs for CTRL, XHCI_EC, XHCI_GBL,
|
||||
USB_PHY and USB_MDIO registers and an optional pair
|
||||
for the BDC registers
|
||||
- reg-names: "ctrl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"
|
||||
|
||||
- #phy-cells: Shall be 1 as it expects one argument for setting
|
||||
the type of the PHY. Possible values are:
|
||||
- PHY_TYPE_USB2 for USB1.1/2.0 PHY
|
||||
- PHY_TYPE_USB3 for USB3.x PHY
|
||||
|
||||
Optional Properties:
|
||||
- clocks : clock phandles.
|
||||
- clock-names: String, clock name.
|
||||
- interrupts: wakeup interrupt
|
||||
- interrupt-names: "wakeup"
|
||||
- brcm,ipp: Boolean, Invert Port Power.
|
||||
Possible values are: 0 (Don't invert), 1 (Invert)
|
||||
- brcm,ioc: Boolean, Invert Over Current detection.
|
||||
Possible values are: 0 (Don't invert), 1 (Invert)
|
||||
- dr_mode: String, PHY Device mode.
|
||||
Possible values are: "host", "peripheral ", "drd" or "typec-pd"
|
||||
If this property is not defined, the phy will default to "host" mode.
|
||||
- brcm,syscon-piarbctl: phandle to syscon for handling config registers
|
||||
NOTE: one or both of the following two properties must be set
|
||||
- brcm,has-xhci: Boolean indicating the phy has an XHCI phy.
|
||||
- brcm,has-eohci: Boolean indicating the phy has an EHCI/OHCI phy.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
usbphy_0: usb-phy@f0470200 {
|
||||
reg = <0xf0470200 0xb8>,
|
||||
<0xf0471940 0x6c0>;
|
||||
compatible = "brcm,brcmstb-usb-phy";
|
||||
#phy-cells = <1>;
|
||||
dr_mode = "host"
|
||||
brcm,ioc = <1>;
|
||||
brcm,ipp = <1>;
|
||||
brcm,has-xhci;
|
||||
brcm,has-eohci;
|
||||
clocks = <&usb20>, <&usb30>;
|
||||
clock-names = "sw_usb", "sw_usb3";
|
||||
};
|
||||
|
||||
usb-phy@29f0200 {
|
||||
reg = <0x29f0200 0x200>,
|
||||
<0x29c0880 0x30>,
|
||||
<0x29cc100 0x534>,
|
||||
<0x2808000 0x24>,
|
||||
<0x2980080 0x8>;
|
||||
reg-names = "ctrl",
|
||||
"xhci_ec",
|
||||
"xhci_gbl",
|
||||
"usb_phy",
|
||||
"usb_mdio";
|
||||
brcm,ioc = <0x0>;
|
||||
brcm,ipp = <0x0>;
|
||||
compatible = "brcm,bcm7211-usb-phy";
|
||||
interrupts = <0x30>;
|
||||
interrupt-parent = <&vpu_intr1_nosec_intc>;
|
||||
interrupt-names = "wake";
|
||||
#phy-cells = <0x1>;
|
||||
brcm,has-xhci;
|
||||
syscon-piarbctl = <&syscon_piarbctl>;
|
||||
clocks = <&scmi_clk 256>;
|
||||
clock-names = "sw_usb";
|
||||
};
|
||||
196
Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml
Normal file
196
Documentation/devicetree/bindings/phy/brcm,brcmstb-usb-phy.yaml
Normal file
|
|
@ -0,0 +1,196 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/brcm,brcmstb-usb-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom STB USB PHY
|
||||
|
||||
description: Broadcom's PHY that handles EHCI/OHCI and/or XHCI
|
||||
|
||||
maintainers:
|
||||
- Al Cooper <alcooperx@gmail.com>
|
||||
- Rafał Miłecki <rafal@milecki.pl>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- brcm,bcm4908-usb-phy
|
||||
- brcm,bcm7211-usb-phy
|
||||
- brcm,bcm7216-usb-phy
|
||||
- brcm,brcmstb-usb-phy
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 6
|
||||
items:
|
||||
- description: the base CTRL register
|
||||
- description: XHCI EC register
|
||||
- description: XHCI GBL register
|
||||
- description: USB PHY register
|
||||
- description: USB MDIO register
|
||||
- description: BDC register
|
||||
|
||||
reg-names:
|
||||
minItems: 1
|
||||
maxItems: 6
|
||||
items:
|
||||
- const: ctrl
|
||||
- const: xhci_ec
|
||||
- const: xhci_gbl
|
||||
- const: usb_phy
|
||||
- const: usb_mdio
|
||||
- const: bdc_ec
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- const: sw_usb
|
||||
- const: sw_usb3
|
||||
|
||||
interrupts:
|
||||
description: wakeup interrupt
|
||||
|
||||
interrupt-names:
|
||||
const: wake
|
||||
|
||||
brcm,ipp:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Invert Port Power
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
|
||||
brcm,ioc:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: Invert Over Current detection
|
||||
minimum: 0
|
||||
maximum: 1
|
||||
|
||||
dr_mode:
|
||||
description: PHY Device mode. If this property is not defined, the PHY will
|
||||
default to "host" mode.
|
||||
enum:
|
||||
- host
|
||||
- peripheral
|
||||
- drd
|
||||
- typec-pd
|
||||
|
||||
brcm,syscon-piarbctl:
|
||||
description: phandle to syscon for handling config registers
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
brcm,has-xhci:
|
||||
description: Indicates the PHY has an XHCI PHY.
|
||||
type: boolean
|
||||
|
||||
brcm,has-eohci:
|
||||
description: Indicates the PHY has an EHCI/OHCI PHY.
|
||||
type: boolean
|
||||
|
||||
"#phy-cells":
|
||||
description: |
|
||||
Cell allows setting the type of the PHY. Possible values are:
|
||||
- PHY_TYPE_USB2 for USB1.1/2.0 PHY
|
||||
- PHY_TYPE_USB3 for USB3.x PHY
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- reg
|
||||
- "#phy-cells"
|
||||
|
||||
anyOf:
|
||||
- required:
|
||||
- brcm,has-xhci
|
||||
- required:
|
||||
- brcm,has-eohci
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- const: brcm,bcm4908-usb-phy
|
||||
- const: brcm,brcmstb-usb-phy
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: brcm,bcm7211-usb-phy
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 5
|
||||
maxItems: 6
|
||||
reg-names:
|
||||
minItems: 5
|
||||
maxItems: 6
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: brcm,bcm7216-usb-phy
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
reg-names:
|
||||
minItems: 3
|
||||
maxItems: 3
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
|
||||
usb-phy@f0470200 {
|
||||
compatible = "brcm,brcmstb-usb-phy";
|
||||
reg = <0xf0470200 0xb8>,
|
||||
<0xf0471940 0x6c0>;
|
||||
#phy-cells = <1>;
|
||||
dr_mode = "host";
|
||||
brcm,ioc = <1>;
|
||||
brcm,ipp = <1>;
|
||||
brcm,has-xhci;
|
||||
brcm,has-eohci;
|
||||
clocks = <&usb20>, <&usb30>;
|
||||
clock-names = "sw_usb", "sw_usb3";
|
||||
};
|
||||
- |
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
|
||||
usb-phy@29f0200 {
|
||||
compatible = "brcm,bcm7211-usb-phy";
|
||||
reg = <0x29f0200 0x200>,
|
||||
<0x29c0880 0x30>,
|
||||
<0x29cc100 0x534>,
|
||||
<0x2808000 0x24>,
|
||||
<0x2980080 0x8>;
|
||||
reg-names = "ctrl",
|
||||
"xhci_ec",
|
||||
"xhci_gbl",
|
||||
"usb_phy",
|
||||
"usb_mdio";
|
||||
brcm,ioc = <0x0>;
|
||||
brcm,ipp = <0x0>;
|
||||
interrupts = <0x30>;
|
||||
interrupt-parent = <&vpu_intr1_nosec_intc>;
|
||||
interrupt-names = "wake";
|
||||
#phy-cells = <0x1>;
|
||||
brcm,has-xhci;
|
||||
brcm,syscon-piarbctl = <&syscon_piarbctl>;
|
||||
clocks = <&scmi_clk 256>;
|
||||
clock-names = "sw_usb";
|
||||
};
|
||||
85
Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
Normal file
85
Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml
Normal file
|
|
@ -0,0 +1,85 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 MediaTek
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/mediatek,dsi-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek MIPI Display Serial Interface (DSI) PHY binding
|
||||
|
||||
maintainers:
|
||||
- Chun-Kuang Hu <chunkuang.hu@kernel.org>
|
||||
- Philipp Zabel <p.zabel@pengutronix.de>
|
||||
- Chunfeng Yun <chunfeng.yun@mediatek.com>
|
||||
|
||||
description: The MIPI DSI PHY supports up to 4-lane output.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^dsi-phy@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt2701-mipi-tx
|
||||
- mediatek,mt7623-mipi-tx
|
||||
- mediatek,mt8173-mipi-tx
|
||||
- mediatek,mt8183-mipi-tx
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: PLL reference clock
|
||||
|
||||
clock-output-names:
|
||||
maxItems: 1
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
"#clock-cells":
|
||||
const: 0
|
||||
|
||||
nvmem-cells:
|
||||
maxItems: 1
|
||||
description: A phandle to the calibration data provided by a nvmem device,
|
||||
if unspecified, default values shall be used.
|
||||
|
||||
nvmem-cell-names:
|
||||
items:
|
||||
- const: calibration-data
|
||||
|
||||
drive-strength-microamp:
|
||||
description: adjust driving current
|
||||
multipleOf: 200
|
||||
minimum: 2000
|
||||
maximum: 6000
|
||||
default: 4600
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-output-names
|
||||
- "#phy-cells"
|
||||
- "#clock-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/mt8173-clk.h>
|
||||
dsi-phy@10215000 {
|
||||
compatible = "mediatek,mt8173-mipi-tx";
|
||||
reg = <0x10215000 0x1000>;
|
||||
clocks = <&clk26m>;
|
||||
clock-output-names = "mipi_tx0_pll";
|
||||
drive-strength-microamp = <4000>;
|
||||
nvmem-cells= <&mipi_tx_calibration>;
|
||||
nvmem-cell-names = "calibration-data";
|
||||
#clock-cells = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
...
|
||||
92
Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
Normal file
92
Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml
Normal file
|
|
@ -0,0 +1,92 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 MediaTek
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek High Definition Multimedia Interface (HDMI) PHY binding
|
||||
|
||||
maintainers:
|
||||
- Chun-Kuang Hu <chunkuang.hu@kernel.org>
|
||||
- Philipp Zabel <p.zabel@pengutronix.de>
|
||||
- Chunfeng Yun <chunfeng.yun@mediatek.com>
|
||||
|
||||
description: |
|
||||
The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel
|
||||
output and drives the HDMI pads.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^hdmi-phy@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
enum:
|
||||
- mediatek,mt2701-hdmi-phy
|
||||
- mediatek,mt7623-hdmi-phy
|
||||
- mediatek,mt8173-hdmi-phy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: PLL reference clock
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: pll_ref
|
||||
|
||||
clock-output-names:
|
||||
items:
|
||||
- const: hdmitx_dig_cts
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
"#clock-cells":
|
||||
const: 0
|
||||
|
||||
mediatek,ibias:
|
||||
description:
|
||||
TX DRV bias current for < 1.65Gbps
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 63
|
||||
default: 0xa
|
||||
|
||||
mediatek,ibias_up:
|
||||
description:
|
||||
TX DRV bias current for >= 1.65Gbps
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 0
|
||||
maximum: 63
|
||||
default: 0x1c
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- clock-output-names
|
||||
- "#phy-cells"
|
||||
- "#clock-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/mt8173-clk.h>
|
||||
hdmi_phy: hdmi-phy@10209100 {
|
||||
compatible = "mediatek,mt8173-hdmi-phy";
|
||||
reg = <0x10209100 0x24>;
|
||||
clocks = <&apmixedsys CLK_APMIXED_HDMI_REF>;
|
||||
clock-names = "pll_ref";
|
||||
clock-output-names = "hdmitx_dig_cts";
|
||||
mediatek,ibias = <0xa>;
|
||||
mediatek,ibias_up = <0x1c>;
|
||||
#clock-cells = <0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
...
|
||||
260
Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
Normal file
260
Documentation/devicetree/bindings/phy/mediatek,tphy.yaml
Normal file
|
|
@ -0,0 +1,260 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 MediaTek
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/mediatek,tphy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek T-PHY Controller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Chunfeng Yun <chunfeng.yun@mediatek.com>
|
||||
|
||||
description: |
|
||||
The T-PHY controller supports physical layer functionality for a number of
|
||||
controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA.
|
||||
|
||||
Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
|
||||
T-PHY V2 (mt2712) when works on USB mode:
|
||||
-----------------------------------
|
||||
Version 1:
|
||||
port offset bank
|
||||
shared 0x0000 SPLLC
|
||||
0x0100 FMREG
|
||||
u2 port0 0x0800 U2PHY_COM
|
||||
u3 port0 0x0900 U3PHYD
|
||||
0x0a00 U3PHYD_BANK2
|
||||
0x0b00 U3PHYA
|
||||
0x0c00 U3PHYA_DA
|
||||
u2 port1 0x1000 U2PHY_COM
|
||||
u3 port1 0x1100 U3PHYD
|
||||
0x1200 U3PHYD_BANK2
|
||||
0x1300 U3PHYA
|
||||
0x1400 U3PHYA_DA
|
||||
u2 port2 0x1800 U2PHY_COM
|
||||
...
|
||||
|
||||
Version 2:
|
||||
port offset bank
|
||||
u2 port0 0x0000 MISC
|
||||
0x0100 FMREG
|
||||
0x0300 U2PHY_COM
|
||||
u3 port0 0x0700 SPLLC
|
||||
0x0800 CHIP
|
||||
0x0900 U3PHYD
|
||||
0x0a00 U3PHYD_BANK2
|
||||
0x0b00 U3PHYA
|
||||
0x0c00 U3PHYA_DA
|
||||
u2 port1 0x1000 MISC
|
||||
0x1100 FMREG
|
||||
0x1300 U2PHY_COM
|
||||
u3 port1 0x1700 SPLLC
|
||||
0x1800 CHIP
|
||||
0x1900 U3PHYD
|
||||
0x1a00 U3PHYD_BANK2
|
||||
0x1b00 U3PHYA
|
||||
0x1c00 U3PHYA_DA
|
||||
u2 port2 0x2000 MISC
|
||||
...
|
||||
|
||||
SPLLC shared by u3 ports and FMREG shared by u2 ports on V1 are put back
|
||||
into each port; a new bank MISC for u2 ports and CHIP for u3 ports are
|
||||
added on V2.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^t-phy@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt2701-tphy
|
||||
- mediatek,mt7623-tphy
|
||||
- mediatek,mt7622-tphy
|
||||
- mediatek,mt8516-tphy
|
||||
- const: mediatek,generic-tphy-v1
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt2712-tphy
|
||||
- mediatek,mt7629-tphy
|
||||
- mediatek,mt8183-tphy
|
||||
- const: mediatek,generic-tphy-v2
|
||||
- const: mediatek,mt2701-u3phy
|
||||
deprecated: true
|
||||
- const: mediatek,mt2712-u3phy
|
||||
deprecated: true
|
||||
- const: mediatek,mt8173-u3phy
|
||||
|
||||
reg:
|
||||
description:
|
||||
Register shared by multiple ports, exclude port's private register.
|
||||
It is needed for T-PHY V1, such as mt2701 and mt8173, but not for
|
||||
T-PHY V2, such as mt2712.
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
enum: [1, 2]
|
||||
|
||||
"#size-cells":
|
||||
enum: [1, 2]
|
||||
|
||||
# Used with non-empty value if optional 'reg' is not provided.
|
||||
# The format of the value is an arbitrary number of triplets of
|
||||
# (child-bus-address, parent-bus-address, length).
|
||||
ranges: true
|
||||
|
||||
mediatek,src-ref-clk-mhz:
|
||||
description:
|
||||
Frequency of reference clock for slew rate calibrate
|
||||
default: 26
|
||||
|
||||
mediatek,src-coef:
|
||||
description:
|
||||
Coefficient for slew rate calibrate, depends on SoC process
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 28
|
||||
|
||||
# Required child node:
|
||||
patternProperties:
|
||||
"^usb-phy@[0-9a-f]+$":
|
||||
type: object
|
||||
description:
|
||||
A sub-node is required for each port the controller provides.
|
||||
Address range information including the usual 'reg' property
|
||||
is used inside these nodes to describe the controller's topology.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- description: Reference clock, (HS is 48Mhz, SS/P is 24~27Mhz)
|
||||
- description: Reference clock of analog phy
|
||||
description:
|
||||
Uses both clocks if the clock of analog and digital phys are
|
||||
separated, otherwise uses "ref" clock only if needed.
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- const: ref
|
||||
- const: da_ref
|
||||
|
||||
"#phy-cells":
|
||||
const: 1
|
||||
description: |
|
||||
The cells contain the following arguments.
|
||||
|
||||
- description: The PHY type
|
||||
enum:
|
||||
- PHY_TYPE_USB2
|
||||
- PHY_TYPE_USB3
|
||||
- PHY_TYPE_PCIE
|
||||
- PHY_TYPE_SATA
|
||||
|
||||
# The following optional vendor properties are only for debug or HQA test
|
||||
mediatek,eye-src:
|
||||
description:
|
||||
The value of slew rate calibrate (U2 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 7
|
||||
|
||||
mediatek,eye-vrt:
|
||||
description:
|
||||
The selection of VRT reference voltage (U2 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 7
|
||||
|
||||
mediatek,eye-term:
|
||||
description:
|
||||
The selection of HS_TX TERM reference voltage (U2 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 7
|
||||
|
||||
mediatek,intr:
|
||||
description:
|
||||
The selection of internal resistor (U2 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 31
|
||||
|
||||
mediatek,discth:
|
||||
description:
|
||||
The selection of disconnect threshold (U2 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 15
|
||||
|
||||
mediatek,bc12:
|
||||
description:
|
||||
Specify the flag to enable BC1.2 if support it
|
||||
type: boolean
|
||||
|
||||
required:
|
||||
- reg
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/mt8173-clk.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
usb@11271000 {
|
||||
compatible = "mediatek,mt8173-mtu3", "mediatek,mtu3";
|
||||
reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
|
||||
reg-names = "mac", "ippc";
|
||||
phys = <&u2port0 PHY_TYPE_USB2>,
|
||||
<&u3port0 PHY_TYPE_USB3>,
|
||||
<&u2port1 PHY_TYPE_USB2>;
|
||||
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>;
|
||||
clocks = <&topckgen CLK_TOP_USB30_SEL>;
|
||||
clock-names = "sys_ck";
|
||||
};
|
||||
|
||||
t-phy@11290000 {
|
||||
compatible = "mediatek,mt8173-u3phy";
|
||||
reg = <0x11290000 0x800>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
u2port0: usb-phy@11290800 {
|
||||
reg = <0x11290800 0x100>;
|
||||
clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>, <&clk48m>;
|
||||
clock-names = "ref", "da_ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u3port0: usb-phy@11290900 {
|
||||
reg = <0x11290900 0x700>;
|
||||
clocks = <&clk26m>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u2port1: usb-phy@11291000 {
|
||||
reg = <0x11291000 0x100>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
64
Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
Normal file
64
Documentation/devicetree/bindings/phy/mediatek,ufs-phy.yaml
Normal file
|
|
@ -0,0 +1,64 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 MediaTek
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek Universal Flash Storage (UFS) M-PHY binding
|
||||
|
||||
maintainers:
|
||||
- Stanley Chu <stanley.chu@mediatek.com>
|
||||
- Chunfeng Yun <chunfeng.yun@mediatek.com>
|
||||
|
||||
description: |
|
||||
UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
|
||||
Each UFS M-PHY node should have its own node.
|
||||
To bind UFS M-PHY with UFS host controller, the controller node should
|
||||
contain a phandle reference to UFS M-PHY node.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^ufs-phy@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
const: mediatek,mt8183-ufsphy
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Unipro core control clock.
|
||||
- description: M-PHY core control clock.
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: unipro
|
||||
- const: mp
|
||||
|
||||
"#phy-cells":
|
||||
const: 0
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#phy-cells"
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/mt8183-clk.h>
|
||||
ufsphy: ufs-phy@11fa0000 {
|
||||
compatible = "mediatek,mt8183-ufsphy";
|
||||
reg = <0x11fa0000 0xc000>;
|
||||
clocks = <&infracfg CLK_INFRA_UNIPRO_SCK>,
|
||||
<&infracfg CLK_INFRA_UFS_MP_SAP_BCLK>;
|
||||
clock-names = "unipro", "mp";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
...
|
||||
199
Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
Normal file
199
Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
Normal file
|
|
@ -0,0 +1,199 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
# Copyright (c) 2020 MediaTek
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/phy/mediatek,xsphy.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek XS-PHY Controller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Chunfeng Yun <chunfeng.yun@mediatek.com>
|
||||
|
||||
description: |
|
||||
The XS-PHY controller supports physical layer functionality for USB3.1
|
||||
GEN2 controller on MediaTek SoCs.
|
||||
|
||||
Banks layout of xsphy
|
||||
----------------------------------
|
||||
port offset bank
|
||||
u2 port0 0x0000 MISC
|
||||
0x0100 FMREG
|
||||
0x0300 U2PHY_COM
|
||||
u2 port1 0x1000 MISC
|
||||
0x1100 FMREG
|
||||
0x1300 U2PHY_COM
|
||||
u2 port2 0x2000 MISC
|
||||
...
|
||||
u31 common 0x3000 DIG_GLB
|
||||
0x3100 PHYA_GLB
|
||||
u31 port0 0x3400 DIG_LN_TOP
|
||||
0x3500 DIG_LN_TX0
|
||||
0x3600 DIG_LN_RX0
|
||||
0x3700 DIG_LN_DAIF
|
||||
0x3800 PHYA_LN
|
||||
u31 port1 0x3a00 DIG_LN_TOP
|
||||
0x3b00 DIG_LN_TX0
|
||||
0x3c00 DIG_LN_RX0
|
||||
0x3d00 DIG_LN_DAIF
|
||||
0x3e00 PHYA_LN
|
||||
...
|
||||
DIG_GLB & PHYA_GLB are shared by U31 ports.
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
pattern: "^xs-phy@[0-9a-f]+$"
|
||||
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- mediatek,mt3611-xsphy
|
||||
- mediatek,mt3612-xsphy
|
||||
- const: mediatek,xsphy
|
||||
|
||||
reg:
|
||||
description:
|
||||
Register shared by multiple U3 ports, exclude port's private register,
|
||||
if only U2 ports provided, shouldn't use the property.
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
enum: [1, 2]
|
||||
|
||||
"#size-cells":
|
||||
enum: [1, 2]
|
||||
|
||||
ranges: true
|
||||
|
||||
mediatek,src-ref-clk-mhz:
|
||||
description:
|
||||
Frequency of reference clock for slew rate calibrate
|
||||
default: 26
|
||||
|
||||
mediatek,src-coef:
|
||||
description:
|
||||
Coefficient for slew rate calibrate, depends on SoC process
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 17
|
||||
|
||||
# Required child node:
|
||||
patternProperties:
|
||||
"^usb-phy@[0-9a-f]+$":
|
||||
type: object
|
||||
description:
|
||||
A sub-node is required for each port the controller provides.
|
||||
Address range information including the usual 'reg' property
|
||||
is used inside these nodes to describe the controller's topology.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: Reference clock, (HS is 48Mhz, SS/P is 24~27Mhz)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ref
|
||||
|
||||
"#phy-cells":
|
||||
const: 1
|
||||
description: |
|
||||
The cells contain the following arguments.
|
||||
|
||||
- description: The PHY type
|
||||
enum:
|
||||
- PHY_TYPE_USB2
|
||||
- PHY_TYPE_USB3
|
||||
|
||||
# The following optional vendor properties are only for debug or HQA test
|
||||
mediatek,eye-src:
|
||||
description:
|
||||
The value of slew rate calibrate (U2 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 7
|
||||
|
||||
mediatek,eye-vrt:
|
||||
description:
|
||||
The selection of VRT reference voltage (U2 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 7
|
||||
|
||||
mediatek,eye-term:
|
||||
description:
|
||||
The selection of HS_TX TERM reference voltage (U2 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 7
|
||||
|
||||
mediatek,efuse-intr:
|
||||
description:
|
||||
The selection of Internal Resistor (U2/U3 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 63
|
||||
|
||||
mediatek,efuse-tx-imp:
|
||||
description:
|
||||
The selection of TX Impedance (U3 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 31
|
||||
|
||||
mediatek,efuse-rx-imp:
|
||||
description:
|
||||
The selection of RX Impedance (U3 phy)
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
minimum: 1
|
||||
maximum: 31
|
||||
|
||||
required:
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- ranges
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
|
||||
u3phy: xs-phy@11c40000 {
|
||||
compatible = "mediatek,mt3611-xsphy", "mediatek,xsphy";
|
||||
reg = <0x11c43000 0x0200>;
|
||||
mediatek,src-ref-clk-mhz = <26>;
|
||||
mediatek,src-coef = <17>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
u2port0: usb-phy@11c40000 {
|
||||
reg = <0x11c40000 0x0400>;
|
||||
clocks = <&clk48m>;
|
||||
clock-names = "ref";
|
||||
mediatek,eye-src = <4>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u3port0: usb-phy@11c43000 {
|
||||
reg = <0x11c43400 0x0500>;
|
||||
clocks = <&clk26m>;
|
||||
clock-names = "ref";
|
||||
mediatek,efuse-intr = <28>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
...
|
||||
|
|
@ -1,162 +0,0 @@
|
|||
MediaTek T-PHY binding
|
||||
--------------------------
|
||||
|
||||
T-phy controller supports physical layer functionality for a number of
|
||||
controllers on MediaTek SoCs, such as, USB2.0, USB3.0, PCIe, and SATA.
|
||||
|
||||
Required properties (controller (parent) node):
|
||||
- compatible : should be one of
|
||||
"mediatek,generic-tphy-v1"
|
||||
"mediatek,generic-tphy-v2"
|
||||
"mediatek,mt2701-u3phy" (deprecated)
|
||||
"mediatek,mt2712-u3phy" (deprecated)
|
||||
"mediatek,mt8173-u3phy";
|
||||
make use of "mediatek,generic-tphy-v1" on mt2701 instead and
|
||||
"mediatek,generic-tphy-v2" on mt2712 instead.
|
||||
|
||||
- #address-cells: the number of cells used to represent physical
|
||||
base addresses.
|
||||
- #size-cells: the number of cells used to represent the size of an address.
|
||||
- ranges: the address mapping relationship to the parent, defined with
|
||||
- empty value: if optional 'reg' is used.
|
||||
- non-empty value: if optional 'reg' is not used. should set
|
||||
the child's base address to 0, the physical address
|
||||
within parent's address space, and the length of
|
||||
the address map.
|
||||
|
||||
Required nodes : a sub-node is required for each port the controller
|
||||
provides. Address range information including the usual
|
||||
'reg' property is used inside these nodes to describe
|
||||
the controller's topology.
|
||||
|
||||
Optional properties (controller (parent) node):
|
||||
- reg : offset and length of register shared by multiple ports,
|
||||
exclude port's private register. It is needed on mt2701
|
||||
and mt8173, but not on mt2712.
|
||||
- mediatek,src-ref-clk-mhz : frequency of reference clock for slew rate
|
||||
calibrate
|
||||
- mediatek,src-coef : coefficient for slew rate calibrate, depends on
|
||||
SoC process
|
||||
|
||||
Required properties (port (child) node):
|
||||
- reg : address and length of the register set for the port.
|
||||
- #phy-cells : should be 1 (See second example)
|
||||
cell after port phandle is phy type from:
|
||||
- PHY_TYPE_USB2
|
||||
- PHY_TYPE_USB3
|
||||
- PHY_TYPE_PCIE
|
||||
- PHY_TYPE_SATA
|
||||
|
||||
Optional properties (PHY_TYPE_USB2 port (child) node):
|
||||
- clocks : a list of phandle + clock-specifier pairs, one for each
|
||||
entry in clock-names
|
||||
- clock-names : may contain
|
||||
"ref": 48M reference clock for HighSpeed (digital) phy; and 26M
|
||||
reference clock for SuperSpeed (digital) phy, sometimes is
|
||||
24M, 25M or 27M, depended on platform.
|
||||
"da_ref": the reference clock of analog phy, used if the clocks
|
||||
of analog and digital phys are separated, otherwise uses
|
||||
"ref" clock only if needed.
|
||||
|
||||
- mediatek,eye-src : u32, the value of slew rate calibrate
|
||||
- mediatek,eye-vrt : u32, the selection of VRT reference voltage
|
||||
- mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
|
||||
- mediatek,bc12 : bool, enable BC12 of u2phy if support it
|
||||
- mediatek,discth : u32, the selection of disconnect threshold
|
||||
- mediatek,intr : u32, the selection of internal R (resistance)
|
||||
|
||||
Example:
|
||||
|
||||
u3phy: usb-phy@11290000 {
|
||||
compatible = "mediatek,mt8173-u3phy";
|
||||
reg = <0 0x11290000 0 0x800>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
u2port0: usb-phy@11290800 {
|
||||
reg = <0 0x11290800 0 0x100>;
|
||||
clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u3port0: usb-phy@11290900 {
|
||||
reg = <0 0x11290800 0 0x700>;
|
||||
clocks = <&clk26m>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u2port1: usb-phy@11291000 {
|
||||
reg = <0 0x11291000 0 0x100>;
|
||||
clocks = <&apmixedsys CLK_APMIXED_REF2USB_TX>;
|
||||
clock-names = "ref";
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
Specifying phy control of devices
|
||||
---------------------------------
|
||||
|
||||
Device nodes should specify the configuration required in their "phys"
|
||||
property, containing a phandle to the phy port node and a device type;
|
||||
phy-names for each port are optional.
|
||||
|
||||
Example:
|
||||
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
|
||||
usb30: usb@11270000 {
|
||||
...
|
||||
phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
|
||||
phy-names = "usb2-0", "usb3-0";
|
||||
...
|
||||
};
|
||||
|
||||
|
||||
Layout differences of banks between mt8173/mt2701 and mt2712
|
||||
-------------------------------------------------------------
|
||||
mt8173 and mt2701:
|
||||
port offset bank
|
||||
shared 0x0000 SPLLC
|
||||
0x0100 FMREG
|
||||
u2 port0 0x0800 U2PHY_COM
|
||||
u3 port0 0x0900 U3PHYD
|
||||
0x0a00 U3PHYD_BANK2
|
||||
0x0b00 U3PHYA
|
||||
0x0c00 U3PHYA_DA
|
||||
u2 port1 0x1000 U2PHY_COM
|
||||
u3 port1 0x1100 U3PHYD
|
||||
0x1200 U3PHYD_BANK2
|
||||
0x1300 U3PHYA
|
||||
0x1400 U3PHYA_DA
|
||||
u2 port2 0x1800 U2PHY_COM
|
||||
...
|
||||
|
||||
mt2712:
|
||||
port offset bank
|
||||
u2 port0 0x0000 MISC
|
||||
0x0100 FMREG
|
||||
0x0300 U2PHY_COM
|
||||
u3 port0 0x0700 SPLLC
|
||||
0x0800 CHIP
|
||||
0x0900 U3PHYD
|
||||
0x0a00 U3PHYD_BANK2
|
||||
0x0b00 U3PHYA
|
||||
0x0c00 U3PHYA_DA
|
||||
u2 port1 0x1000 MISC
|
||||
0x1100 FMREG
|
||||
0x1300 U2PHY_COM
|
||||
u3 port1 0x1700 SPLLC
|
||||
0x1800 CHIP
|
||||
0x1900 U3PHYD
|
||||
0x1a00 U3PHYD_BANK2
|
||||
0x1b00 U3PHYA
|
||||
0x1c00 U3PHYA_DA
|
||||
u2 port2 0x2000 MISC
|
||||
...
|
||||
|
||||
SPLLC shared by u3 ports and FMREG shared by u2 ports on
|
||||
mt8173/mt2701 are put back into each port; a new bank MISC for
|
||||
u2 ports and CHIP for u3 ports are added on mt2712.
|
||||
|
|
@ -1,38 +0,0 @@
|
|||
MediaTek Universal Flash Storage (UFS) M-PHY binding
|
||||
--------------------------------------------------------
|
||||
|
||||
UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
|
||||
Each UFS M-PHY node should have its own node.
|
||||
|
||||
To bind UFS M-PHY with UFS host controller, the controller node should
|
||||
contain a phandle reference to UFS M-PHY node.
|
||||
|
||||
Required properties for UFS M-PHY nodes:
|
||||
- compatible : Compatible list, contains the following controller:
|
||||
"mediatek,mt8183-ufsphy" for ufs phy
|
||||
persent on MT81xx chipsets.
|
||||
- reg : Address and length of the UFS M-PHY register set.
|
||||
- #phy-cells : This property shall be set to 0.
|
||||
- clocks : List of phandle and clock specifier pairs.
|
||||
- clock-names : List of clock input name strings sorted in the same
|
||||
order as the clocks property. Following clocks are
|
||||
mandatory.
|
||||
"unipro": Unipro core control clock.
|
||||
"mp": M-PHY core control clock.
|
||||
|
||||
Example:
|
||||
|
||||
ufsphy: phy@11fa0000 {
|
||||
compatible = "mediatek,mt8183-ufsphy";
|
||||
reg = <0 0x11fa0000 0 0xc000>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clocks = <&infracfg_ao INFRACFG_AO_UNIPRO_SCK_CG>,
|
||||
<&infracfg_ao INFRACFG_AO_UFS_MP_SAP_BCLK_CG>;
|
||||
clock-names = "unipro", "mp";
|
||||
};
|
||||
|
||||
ufshci@11270000 {
|
||||
...
|
||||
phys = <&ufsphy>;
|
||||
};
|
||||
|
|
@ -1,109 +0,0 @@
|
|||
MediaTek XS-PHY binding
|
||||
--------------------------
|
||||
|
||||
The XS-PHY controller supports physical layer functionality for USB3.1
|
||||
GEN2 controller on MediaTek SoCs.
|
||||
|
||||
Required properties (controller (parent) node):
|
||||
- compatible : should be "mediatek,<soc-model>-xsphy", "mediatek,xsphy",
|
||||
soc-model is the name of SoC, such as mt3611 etc;
|
||||
when using "mediatek,xsphy" compatible string, you need SoC specific
|
||||
ones in addition, one of:
|
||||
- "mediatek,mt3611-xsphy"
|
||||
|
||||
- #address-cells, #size-cells : should use the same values as the root node
|
||||
- ranges: must be present
|
||||
|
||||
Optional properties (controller (parent) node):
|
||||
- reg : offset and length of register shared by multiple U3 ports,
|
||||
exclude port's private register, if only U2 ports provided,
|
||||
shouldn't use the property.
|
||||
- mediatek,src-ref-clk-mhz : u32, frequency of reference clock for slew rate
|
||||
calibrate
|
||||
- mediatek,src-coef : u32, coefficient for slew rate calibrate, depends on
|
||||
SoC process
|
||||
|
||||
Required nodes : a sub-node is required for each port the controller
|
||||
provides. Address range information including the usual
|
||||
'reg' property is used inside these nodes to describe
|
||||
the controller's topology.
|
||||
|
||||
Required properties (port (child) node):
|
||||
- reg : address and length of the register set for the port.
|
||||
- clocks : a list of phandle + clock-specifier pairs, one for each
|
||||
entry in clock-names
|
||||
- clock-names : must contain
|
||||
"ref": 48M reference clock for HighSpeed analog phy; and 26M
|
||||
reference clock for SuperSpeedPlus analog phy, sometimes is
|
||||
24M, 25M or 27M, depended on platform.
|
||||
- #phy-cells : should be 1
|
||||
cell after port phandle is phy type from:
|
||||
- PHY_TYPE_USB2
|
||||
- PHY_TYPE_USB3
|
||||
|
||||
The following optional properties are only for debug or HQA test
|
||||
Optional properties (PHY_TYPE_USB2 port (child) node):
|
||||
- mediatek,eye-src : u32, the value of slew rate calibrate
|
||||
- mediatek,eye-vrt : u32, the selection of VRT reference voltage
|
||||
- mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage
|
||||
- mediatek,efuse-intr : u32, the selection of Internal Resistor
|
||||
|
||||
Optional properties (PHY_TYPE_USB3 port (child) node):
|
||||
- mediatek,efuse-intr : u32, the selection of Internal Resistor
|
||||
- mediatek,efuse-tx-imp : u32, the selection of TX Impedance
|
||||
- mediatek,efuse-rx-imp : u32, the selection of RX Impedance
|
||||
|
||||
Banks layout of xsphy
|
||||
-------------------------------------------------------------
|
||||
port offset bank
|
||||
u2 port0 0x0000 MISC
|
||||
0x0100 FMREG
|
||||
0x0300 U2PHY_COM
|
||||
u2 port1 0x1000 MISC
|
||||
0x1100 FMREG
|
||||
0x1300 U2PHY_COM
|
||||
u2 port2 0x2000 MISC
|
||||
...
|
||||
u31 common 0x3000 DIG_GLB
|
||||
0x3100 PHYA_GLB
|
||||
u31 port0 0x3400 DIG_LN_TOP
|
||||
0x3500 DIG_LN_TX0
|
||||
0x3600 DIG_LN_RX0
|
||||
0x3700 DIG_LN_DAIF
|
||||
0x3800 PHYA_LN
|
||||
u31 port1 0x3a00 DIG_LN_TOP
|
||||
0x3b00 DIG_LN_TX0
|
||||
0x3c00 DIG_LN_RX0
|
||||
0x3d00 DIG_LN_DAIF
|
||||
0x3e00 PHYA_LN
|
||||
...
|
||||
|
||||
DIG_GLB & PHYA_GLB are shared by U31 ports.
|
||||
|
||||
Example:
|
||||
|
||||
u3phy: usb-phy@11c40000 {
|
||||
compatible = "mediatek,mt3611-xsphy", "mediatek,xsphy";
|
||||
reg = <0 0x11c43000 0 0x0200>;
|
||||
mediatek,src-ref-clk-mhz = <26>;
|
||||
mediatek,src-coef = <17>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
u2port0: usb-phy@11c40000 {
|
||||
reg = <0 0x11c40000 0 0x0400>;
|
||||
clocks = <&clk48m>;
|
||||
clock-names = "ref";
|
||||
mediatek,eye-src = <4>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
u3port0: usb-phy@11c43000 {
|
||||
reg = <0 0x11c43400 0 0x0500>;
|
||||
clocks = <&clk26m>;
|
||||
clock-names = "ref";
|
||||
mediatek,efuse-intr = <28>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
|
@ -45,6 +45,12 @@ properties:
|
|||
"#size-cells":
|
||||
const: 0
|
||||
|
||||
vdda1v1-supply:
|
||||
description: regulator providing 1V1 power supply to the PLL block
|
||||
|
||||
vdda1v8-supply:
|
||||
description: regulator providing 1V8 power supply to the PLL block
|
||||
|
||||
#Required child nodes:
|
||||
|
||||
patternProperties:
|
||||
|
|
@ -61,12 +67,6 @@ patternProperties:
|
|||
phy-supply:
|
||||
description: regulator providing 3V3 power supply to the PHY.
|
||||
|
||||
vdda1v1-supply:
|
||||
description: regulator providing 1V1 power supply to the PLL block
|
||||
|
||||
vdda1v8-supply:
|
||||
description: regulator providing 1V8 power supply to the PLL block
|
||||
|
||||
"#phy-cells":
|
||||
enum: [ 0x0, 0x1 ]
|
||||
|
||||
|
|
@ -90,8 +90,6 @@ patternProperties:
|
|||
required:
|
||||
- reg
|
||||
- phy-supply
|
||||
- vdda1v1-supply
|
||||
- vdda1v8-supply
|
||||
- "#phy-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
|
@ -102,6 +100,8 @@ required:
|
|||
- clocks
|
||||
- "#address-cells"
|
||||
- "#size-cells"
|
||||
- vdda1v1-supply
|
||||
- vdda1v8-supply
|
||||
- usb-phy@0
|
||||
- usb-phy@1
|
||||
|
||||
|
|
@ -116,22 +116,20 @@ examples:
|
|||
reg = <0x5a006000 0x1000>;
|
||||
clocks = <&rcc USBPHY_K>;
|
||||
resets = <&rcc USBPHY_R>;
|
||||
vdda1v1-supply = <®11>;
|
||||
vdda1v8-supply = <®18>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
usbphyc_port0: usb-phy@0 {
|
||||
reg = <0>;
|
||||
phy-supply = <&vdd_usb>;
|
||||
vdda1v1-supply = <®11>;
|
||||
vdda1v8-supply = <®18>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
usbphyc_port1: usb-phy@1 {
|
||||
reg = <1>;
|
||||
phy-supply = <&vdd_usb>;
|
||||
vdda1v1-supply = <®11>;
|
||||
vdda1v8-supply = <®18>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -25,19 +25,32 @@ properties:
|
|||
- qcom,msm8998-qmp-pcie-phy
|
||||
- qcom,msm8998-qmp-ufs-phy
|
||||
- qcom,msm8998-qmp-usb3-phy
|
||||
- qcom,sc8180x-qmp-ufs-phy
|
||||
- qcom,sc8180x-qmp-usb3-phy
|
||||
- qcom,sdm845-qhp-pcie-phy
|
||||
- qcom,sdm845-qmp-pcie-phy
|
||||
- qcom,sdm845-qmp-ufs-phy
|
||||
- qcom,sdm845-qmp-usb3-uni-phy
|
||||
- qcom,sm8150-qmp-ufs-phy
|
||||
- qcom,sm8150-qmp-usb3-phy
|
||||
- qcom,sm8150-qmp-usb3-uni-phy
|
||||
- qcom,sm8250-qmp-ufs-phy
|
||||
- qcom,sm8250-qmp-gen3x1-pcie-phy
|
||||
- qcom,sm8250-qmp-gen3x2-pcie-phy
|
||||
- qcom,sm8250-qmp-modem-pcie-phy
|
||||
- qcom,sm8250-qmp-usb3-phy
|
||||
- qcom,sm8250-qmp-usb3-uni-phy
|
||||
- qcom,sm8350-qmp-ufs-phy
|
||||
- qcom,sm8350-qmp-usb3-phy
|
||||
- qcom,sm8350-qmp-usb3-uni-phy
|
||||
- qcom,sdx55-qmp-usb3-uni-phy
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
- description: Address and length of PHY's common serdes block.
|
||||
- description: Address and length of PHY's DP_COM control block.
|
||||
|
||||
"#clock-cells":
|
||||
enum: [ 1, 2 ]
|
||||
|
|
@ -131,6 +144,32 @@ allOf:
|
|||
items:
|
||||
- const: phy
|
||||
- const: common
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sdx55-qmp-usb3-uni-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Phy aux clock.
|
||||
- description: Phy config clock.
|
||||
- description: 19.2 MHz ref clk.
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: cfg_ahb
|
||||
- const: ref
|
||||
resets:
|
||||
items:
|
||||
- description: reset of phy block.
|
||||
- description: phy common block reset.
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: common
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -285,6 +324,64 @@ allOf:
|
|||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8150-qmp-usb3-phy
|
||||
- qcom,sm8150-qmp-usb3-uni-phy
|
||||
- qcom,sm8250-qmp-usb3-uni-phy
|
||||
- qcom,sm8350-qmp-usb3-uni-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Phy aux clock.
|
||||
- description: 19.2 MHz ref clk source.
|
||||
- description: 19.2 MHz ref clk.
|
||||
- description: Phy common block aux clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: ref_clk_src
|
||||
- const: ref
|
||||
- const: com_aux
|
||||
resets:
|
||||
items:
|
||||
- description: reset of phy block.
|
||||
- description: phy common block reset.
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: common
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- qcom,sm8250-qmp-usb3-phy
|
||||
- qcom,sm8350-qmp-usb3-phy
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Phy aux clock.
|
||||
- description: 19.2 MHz ref clk.
|
||||
- description: Phy common block aux clock.
|
||||
clock-names:
|
||||
items:
|
||||
- const: aux
|
||||
- const: ref_clk_src
|
||||
- const: com_aux
|
||||
resets:
|
||||
items:
|
||||
- description: reset of phy block.
|
||||
- description: phy common block reset.
|
||||
reset-names:
|
||||
items:
|
||||
- const: phy
|
||||
- const: common
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
|
|
|||
|
|
@ -21,6 +21,8 @@ properties:
|
|||
- qcom,ipq8074-qusb2-phy
|
||||
- qcom,msm8996-qusb2-phy
|
||||
- qcom,msm8998-qusb2-phy
|
||||
- qcom,sdm660-qusb2-phy
|
||||
- qcom,ipq6018-qusb2-phy
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,sc7180-qusb2-phy
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@ properties:
|
|||
compatible:
|
||||
enum:
|
||||
- qcom,usb-hs-28nm-femtophy
|
||||
- qcom,usb-hs-28nm-mdm9607
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -17,6 +17,8 @@ properties:
|
|||
enum:
|
||||
- qcom,usb-snps-hs-7nm-phy
|
||||
- qcom,sm8150-usb-hs-phy
|
||||
- qcom,sm8250-usb-hs-phy
|
||||
- qcom,sm8350-usb-hs-phy
|
||||
- qcom,usb-snps-femto-v2-phy
|
||||
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -16,11 +16,11 @@ Optional properties:
|
|||
- drive-impedance-ohm: Specifies the drive impedance in Ohm.
|
||||
Possible values are 33, 40, 50, 66 and 100.
|
||||
If not set, the default value of 50 will be applied.
|
||||
- enable-strobe-pulldown: Enable internal pull-down for the strobe line.
|
||||
If not set, pull-down is not used.
|
||||
- output-tapdelay-select: Specifies the phyctrl_otapdlysec register.
|
||||
If not set, the register defaults to 0x4.
|
||||
Maximum value 0xf.
|
||||
- rockchip,enable-strobe-pulldown: Enable internal pull-down for the strobe
|
||||
line. If not set, pull-down is not used.
|
||||
- rockchip,output-tapdelay-select: Specifies the phyctrl_otapdlysec register.
|
||||
If not set, the register defaults to 0x4.
|
||||
Maximum value 0xf.
|
||||
|
||||
Example:
|
||||
|
||||
|
|
|
|||
|
|
@ -151,7 +151,7 @@ patternProperties:
|
|||
WIZ node should have '1' subnode for the SERDES. It could be either
|
||||
Sierra SERDES or Torrent SERDES. Sierra SERDES should follow the
|
||||
bindings specified in
|
||||
Documentation/devicetree/bindings/phy/phy-cadence-sierra.txt
|
||||
Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml
|
||||
Torrent SERDES should follow the bindings specified in
|
||||
Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
|
||||
|
||||
|
|
|
|||
|
|
@ -6,10 +6,10 @@ Mediatek SoCs.
|
|||
|
||||
Required properties:
|
||||
- compatible Should be "mediatek,mt8183-scp"
|
||||
- reg Should contain the address ranges for the two memory
|
||||
regions, SRAM and CFG.
|
||||
- reg-names Contains the corresponding names for the two memory
|
||||
regions. These should be named "sram" & "cfg".
|
||||
- reg Should contain the address ranges for memory regions:
|
||||
SRAM, CFG, and L1TCM.
|
||||
- reg-names Contains the corresponding names for the memory regions:
|
||||
"sram", "cfg", and "l1tcm".
|
||||
- clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
|
||||
- clock-names Contains the corresponding name for the clock. This
|
||||
should be named "main".
|
||||
|
|
|
|||
|
|
@ -25,6 +25,10 @@ on the Qualcomm ADSP Hexagon core.
|
|||
"qcom,sm8250-adsp-pas"
|
||||
"qcom,sm8250-cdsp-pas"
|
||||
"qcom,sm8250-slpi-pas"
|
||||
"qcom,sm8350-adsp-pas"
|
||||
"qcom,sm8350-cdsp-pas"
|
||||
"qcom,sm8350-slpi-pas"
|
||||
"qcom,sm8350-mpss-pas"
|
||||
|
||||
- interrupts-extended:
|
||||
Usage: required
|
||||
|
|
@ -51,10 +55,14 @@ on the Qualcomm ADSP Hexagon core.
|
|||
qcom,sm8250-adsp-pas:
|
||||
qcom,sm8250-cdsp-pas:
|
||||
qcom,sm8250-slpi-pas:
|
||||
qcom,sm8350-adsp-pas:
|
||||
qcom,sm8350-cdsp-pas:
|
||||
qcom,sm8350-slpi-pas:
|
||||
must be "wdog", "fatal", "ready", "handover", "stop-ack"
|
||||
qcom,qcs404-wcss-pas:
|
||||
qcom,sc7180-mpss-pas:
|
||||
qcom,sm8150-mpss-pas:
|
||||
qcom,sm8350-mpss-pas:
|
||||
must be "wdog", "fatal", "ready", "handover", "stop-ack",
|
||||
"shutdown-ack"
|
||||
|
||||
|
|
@ -114,13 +122,17 @@ on the Qualcomm ADSP Hexagon core.
|
|||
qcom,sm8150-adsp-pas:
|
||||
qcom,sm8150-cdsp-pas:
|
||||
qcom,sm8250-cdsp-pas:
|
||||
qcom,sm8350-cdsp-pas:
|
||||
must be "cx", "load_state"
|
||||
qcom,sc7180-mpss-pas:
|
||||
qcom,sm8150-mpss-pas:
|
||||
qcom,sm8350-mpss-pas:
|
||||
must be "cx", "load_state", "mss"
|
||||
qcom,sm8250-adsp-pas:
|
||||
qcom,sm8350-adsp-pas:
|
||||
qcom,sm8150-slpi-pas:
|
||||
qcom,sm8250-slpi-pas:
|
||||
qcom,sm8350-slpi-pas:
|
||||
must be "lcx", "lmx", "load_state"
|
||||
|
||||
- memory-region:
|
||||
|
|
|
|||
|
|
@ -80,6 +80,7 @@ and its resource dependencies. It is described by the following properties:
|
|||
Definition: must be one of:
|
||||
"qcom,wcn3620",
|
||||
"qcom,wcn3660",
|
||||
"qcom,wcn3660b",
|
||||
"qcom,wcn3680"
|
||||
|
||||
- clocks:
|
||||
|
|
|
|||
|
|
@ -94,7 +94,6 @@ available subsections can be seen below.
|
|||
pps
|
||||
ptp
|
||||
phy/index
|
||||
pti_intel_mid
|
||||
pwm
|
||||
pldmfw/index
|
||||
rfkill
|
||||
|
|
|
|||
|
|
@ -1,108 +0,0 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
=============
|
||||
Intel MID PTI
|
||||
=============
|
||||
|
||||
The Intel MID PTI project is HW implemented in Intel Atom
|
||||
system-on-a-chip designs based on the Parallel Trace
|
||||
Interface for MIPI P1149.7 cJTAG standard. The kernel solution
|
||||
for this platform involves the following files::
|
||||
|
||||
./include/linux/pti.h
|
||||
./drivers/.../n_tracesink.h
|
||||
./drivers/.../n_tracerouter.c
|
||||
./drivers/.../n_tracesink.c
|
||||
./drivers/.../pti.c
|
||||
|
||||
pti.c is the driver that enables various debugging features
|
||||
popular on platforms from certain mobile manufacturers.
|
||||
n_tracerouter.c and n_tracesink.c allow extra system information to
|
||||
be collected and routed to the pti driver, such as trace
|
||||
debugging data from a modem. Although n_tracerouter
|
||||
and n_tracesink are a part of the complete PTI solution,
|
||||
these two line disciplines can work separately from
|
||||
pti.c and route any data stream from one /dev/tty node
|
||||
to another /dev/tty node via kernel-space. This provides
|
||||
a stable, reliable connection that will not break unless
|
||||
the user-space application shuts down (plus avoids
|
||||
kernel->user->kernel context switch overheads of routing
|
||||
data).
|
||||
|
||||
An example debugging usage for this driver system:
|
||||
|
||||
* Hook /dev/ttyPTI0 to syslogd. Opening this port will also start
|
||||
a console device to further capture debugging messages to PTI.
|
||||
* Hook /dev/ttyPTI1 to modem debugging data to write to PTI HW.
|
||||
This is where n_tracerouter and n_tracesink are used.
|
||||
* Hook /dev/pti to a user-level debugging application for writing
|
||||
to PTI HW.
|
||||
* `Use mipi_` Kernel Driver API in other device drivers for
|
||||
debugging to PTI by first requesting a PTI write address via
|
||||
mipi_request_masterchannel(1).
|
||||
|
||||
Below is example pseudo-code on how a 'privileged' application
|
||||
can hook up n_tracerouter and n_tracesink to any tty on
|
||||
a system. 'Privileged' means the application has enough
|
||||
privileges to successfully manipulate the ldisc drivers
|
||||
but is not just blindly executing as 'root'. Keep in mind
|
||||
the use of ioctl(,TIOCSETD,) is not specific to the n_tracerouter
|
||||
and n_tracesink line discpline drivers but is a generic
|
||||
operation for a program to use a line discpline driver
|
||||
on a tty port other than the default n_tty:
|
||||
|
||||
.. code-block:: c
|
||||
|
||||
/////////// To hook up n_tracerouter and n_tracesink /////////
|
||||
|
||||
// Note that n_tracerouter depends on n_tracesink.
|
||||
#include <errno.h>
|
||||
#define ONE_TTY "/dev/ttyOne"
|
||||
#define TWO_TTY "/dev/ttyTwo"
|
||||
|
||||
// needed global to hand onto ldisc connection
|
||||
static int g_fd_source = -1;
|
||||
static int g_fd_sink = -1;
|
||||
|
||||
// these two vars used to grab LDISC values from loaded ldisc drivers
|
||||
// in OS. Look at /proc/tty/ldiscs to get the right numbers from
|
||||
// the ldiscs loaded in the system.
|
||||
int source_ldisc_num, sink_ldisc_num = -1;
|
||||
int retval;
|
||||
|
||||
g_fd_source = open(ONE_TTY, O_RDWR); // must be R/W
|
||||
g_fd_sink = open(TWO_TTY, O_RDWR); // must be R/W
|
||||
|
||||
if (g_fd_source <= 0) || (g_fd_sink <= 0) {
|
||||
// doubt you'll want to use these exact error lines of code
|
||||
printf("Error on open(). errno: %d\n",errno);
|
||||
return errno;
|
||||
}
|
||||
|
||||
retval = ioctl(g_fd_sink, TIOCSETD, &sink_ldisc_num);
|
||||
if (retval < 0) {
|
||||
printf("Error on ioctl(). errno: %d\n", errno);
|
||||
return errno;
|
||||
}
|
||||
|
||||
retval = ioctl(g_fd_source, TIOCSETD, &source_ldisc_num);
|
||||
if (retval < 0) {
|
||||
printf("Error on ioctl(). errno: %d\n", errno);
|
||||
return errno;
|
||||
}
|
||||
|
||||
/////////// To disconnect n_tracerouter and n_tracesink ////////
|
||||
|
||||
// First make sure data through the ldiscs has stopped.
|
||||
|
||||
// Second, disconnect ldiscs. This provides a
|
||||
// little cleaner shutdown on tty stack.
|
||||
sink_ldisc_num = 0;
|
||||
source_ldisc_num = 0;
|
||||
ioctl(g_fd_uart, TIOCSETD, &sink_ldisc_num);
|
||||
ioctl(g_fd_gadget, TIOCSETD, &source_ldisc_num);
|
||||
|
||||
// Three, program closes connection, and cleanup:
|
||||
close(g_fd_uart);
|
||||
close(g_fd_gadget);
|
||||
g_fd_uart = g_fd_gadget = NULL;
|
||||
|
|
@ -501,6 +501,34 @@ Developer only needs to provide a sub feature driver with matched feature id.
|
|||
FME Partial Reconfiguration Sub Feature driver (see drivers/fpga/dfl-fme-pr.c)
|
||||
could be a reference.
|
||||
|
||||
Location of DFLs on a PCI Device
|
||||
================================
|
||||
The original method for finding a DFL on a PCI device assumed the start of the
|
||||
first DFL to offset 0 of bar 0. If the first node of the DFL is an FME,
|
||||
then further DFLs in the port(s) are specified in FME header registers.
|
||||
Alternatively, a PCIe vendor specific capability structure can be used to
|
||||
specify the location of all the DFLs on the device, providing flexibility
|
||||
for the type of starting node in the DFL. Intel has reserved the
|
||||
VSEC ID of 0x43 for this purpose. The vendor specific
|
||||
data begins with a 4 byte vendor specific register for the number of DFLs followed 4 byte
|
||||
Offset/BIR vendor specific registers for each DFL. Bits 2:0 of Offset/BIR register
|
||||
indicates the BAR, and bits 31:3 form the 8 byte aligned offset where bits 2:0 are
|
||||
zero.
|
||||
::
|
||||
|
||||
+----------------------------+
|
||||
|31 Number of DFLS 0|
|
||||
+----------------------------+
|
||||
|31 Offset 3|2 BIR 0|
|
||||
+----------------------------+
|
||||
. . .
|
||||
+----------------------------+
|
||||
|31 Offset 3|2 BIR 0|
|
||||
+----------------------------+
|
||||
|
||||
Being able to specify more than one DFL per BAR has been considered, but it
|
||||
was determined the use case did not provide value. Specifying a single DFL
|
||||
per BAR simplifies the implementation and allows for extra error checking.
|
||||
|
||||
Open discussion
|
||||
===============
|
||||
|
|
|
|||
|
|
@ -512,6 +512,38 @@ The --itrace option controls the type and frequency of synthesized events
|
|||
Note that only 64-bit programs are currently supported - further work is
|
||||
required to support instruction decode of 32-bit Arm programs.
|
||||
|
||||
2.2) Tracing PID
|
||||
|
||||
The kernel can be built to write the PID value into the PE ContextID registers.
|
||||
For a kernel running at EL1, the PID is stored in CONTEXTIDR_EL1. A PE may
|
||||
implement Arm Virtualization Host Extensions (VHE), which the kernel can
|
||||
run at EL2 as a virtualisation host; in this case, the PID value is stored in
|
||||
CONTEXTIDR_EL2.
|
||||
|
||||
perf provides PMU formats that program the ETM to insert these values into the
|
||||
trace data; the PMU formats are defined as below:
|
||||
|
||||
"contextid1": Available on both EL1 kernel and EL2 kernel. When the
|
||||
kernel is running at EL1, "contextid1" enables the PID
|
||||
tracing; when the kernel is running at EL2, this enables
|
||||
tracing the PID of guest applications.
|
||||
|
||||
"contextid2": Only usable when the kernel is running at EL2. When
|
||||
selected, enables PID tracing on EL2 kernel.
|
||||
|
||||
"contextid": Will be an alias for the option that enables PID
|
||||
tracing. I.e,
|
||||
contextid == contextid1, on EL1 kernel.
|
||||
contextid == contextid2, on EL2 kernel.
|
||||
|
||||
perf will always enable PID tracing at the relevant EL, this is accomplished by
|
||||
automatically enable the "contextid" config - but for EL2 it is possible to make
|
||||
specific adjustments using configs "contextid1" and "contextid2", E.g. if a user
|
||||
wants to trace PIDs for both host and guest, the two configs "contextid1" and
|
||||
"contextid2" can be set at the same time:
|
||||
|
||||
perf record -e cs_etm/contextid1,contextid2/u -- vm
|
||||
|
||||
|
||||
Generating coverage files for Feedback Directed Optimization: AutoFDO
|
||||
---------------------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -179,6 +179,7 @@ Code Seq# Include File Comments
|
|||
'R' 00-1F linux/random.h conflict!
|
||||
'R' 01 linux/rfkill.h conflict!
|
||||
'R' C0-DF net/bluetooth/rfcomm.h
|
||||
'R' E0 uapi/linux/fsl_mc.h
|
||||
'S' all linux/cdrom.h conflict!
|
||||
'S' 80-81 scsi/scsi_ioctl.h conflict!
|
||||
'S' 82-FF scsi/scsi.h conflict!
|
||||
|
|
@ -318,6 +319,7 @@ Code Seq# Include File Comments
|
|||
0xA0 all linux/sdp/sdp.h Industrial Device Project
|
||||
<mailto:kenji@bitgate.com>
|
||||
0xA1 0 linux/vtpm_proxy.h TPM Emulator Proxy Driver
|
||||
0xA2 all uapi/linux/acrn.h ACRN hypervisor
|
||||
0xA3 80-8F Port ACL in development:
|
||||
<mailto:tlewis@mindspring.com>
|
||||
0xA3 90-9F linux/dtlk.h
|
||||
|
|
|
|||
46
Documentation/virt/acrn/cpuid.rst
Normal file
46
Documentation/virt/acrn/cpuid.rst
Normal file
|
|
@ -0,0 +1,46 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
===============
|
||||
ACRN CPUID bits
|
||||
===============
|
||||
|
||||
A guest VM running on an ACRN hypervisor can check some of its features using
|
||||
CPUID.
|
||||
|
||||
ACRN cpuid functions are:
|
||||
|
||||
function: 0x40000000
|
||||
|
||||
returns::
|
||||
|
||||
eax = 0x40000010
|
||||
ebx = 0x4e524341
|
||||
ecx = 0x4e524341
|
||||
edx = 0x4e524341
|
||||
|
||||
Note that this value in ebx, ecx and edx corresponds to the string
|
||||
"ACRNACRNACRN". The value in eax corresponds to the maximum cpuid function
|
||||
present in this leaf, and will be updated if more functions are added in the
|
||||
future.
|
||||
|
||||
function: define ACRN_CPUID_FEATURES (0x40000001)
|
||||
|
||||
returns::
|
||||
|
||||
ebx, ecx, edx
|
||||
eax = an OR'ed group of (1 << flag)
|
||||
|
||||
where ``flag`` is defined as below:
|
||||
|
||||
================================= =========== ================================
|
||||
flag value meaning
|
||||
================================= =========== ================================
|
||||
ACRN_FEATURE_PRIVILEGED_VM 0 guest VM is a privileged VM
|
||||
================================= =========== ================================
|
||||
|
||||
function: 0x40000010
|
||||
|
||||
returns::
|
||||
|
||||
ebx, ecx, edx
|
||||
eax = (Virtual) TSC frequency in kHz.
|
||||
12
Documentation/virt/acrn/index.rst
Normal file
12
Documentation/virt/acrn/index.rst
Normal file
|
|
@ -0,0 +1,12 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
===============
|
||||
ACRN Hypervisor
|
||||
===============
|
||||
|
||||
.. toctree::
|
||||
:maxdepth: 1
|
||||
|
||||
introduction
|
||||
io-request
|
||||
cpuid
|
||||
43
Documentation/virt/acrn/introduction.rst
Normal file
43
Documentation/virt/acrn/introduction.rst
Normal file
|
|
@ -0,0 +1,43 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
ACRN Hypervisor Introduction
|
||||
============================
|
||||
|
||||
The ACRN Hypervisor is a Type 1 hypervisor, running directly on bare-metal
|
||||
hardware. It has a privileged management VM, called Service VM, to manage User
|
||||
VMs and do I/O emulation.
|
||||
|
||||
ACRN userspace is an application running in the Service VM that emulates
|
||||
devices for a User VM based on command line configurations. ACRN Hypervisor
|
||||
Service Module (HSM) is a kernel module in the Service VM which provides
|
||||
hypervisor services to the ACRN userspace.
|
||||
|
||||
Below figure shows the architecture.
|
||||
|
||||
::
|
||||
|
||||
Service VM User VM
|
||||
+----------------------------+ | +------------------+
|
||||
| +--------------+ | | | |
|
||||
| |ACRN userspace| | | | |
|
||||
| +--------------+ | | | |
|
||||
|-----------------ioctl------| | | | ...
|
||||
|kernel space +----------+ | | | |
|
||||
| | HSM | | | | Drivers |
|
||||
| +----------+ | | | |
|
||||
+--------------------|-------+ | +------------------+
|
||||
+---------------------hypercall----------------------------------------+
|
||||
| ACRN Hypervisor |
|
||||
+----------------------------------------------------------------------+
|
||||
| Hardware |
|
||||
+----------------------------------------------------------------------+
|
||||
|
||||
ACRN userspace allocates memory for the User VM, configures and initializes the
|
||||
devices used by the User VM, loads the virtual bootloader, initializes the
|
||||
virtual CPU state and handles I/O request accesses from the User VM. It uses
|
||||
ioctls to communicate with the HSM. HSM implements hypervisor services by
|
||||
interacting with the ACRN Hypervisor via hypercalls. HSM exports a char device
|
||||
interface (/dev/acrn_hsm) to userspace.
|
||||
|
||||
The ACRN hypervisor is open for contribution from anyone. The source repo is
|
||||
available at https://github.com/projectacrn/acrn-hypervisor.
|
||||
97
Documentation/virt/acrn/io-request.rst
Normal file
97
Documentation/virt/acrn/io-request.rst
Normal file
|
|
@ -0,0 +1,97 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
I/O request handling
|
||||
====================
|
||||
|
||||
An I/O request of a User VM, which is constructed by the hypervisor, is
|
||||
distributed by the ACRN Hypervisor Service Module to an I/O client
|
||||
corresponding to the address range of the I/O request. Details of I/O request
|
||||
handling are described in the following sections.
|
||||
|
||||
1. I/O request
|
||||
--------------
|
||||
|
||||
For each User VM, there is a shared 4-KByte memory region used for I/O requests
|
||||
communication between the hypervisor and Service VM. An I/O request is a
|
||||
256-byte structure buffer, which is 'struct acrn_io_request', that is filled by
|
||||
an I/O handler of the hypervisor when a trapped I/O access happens in a User
|
||||
VM. ACRN userspace in the Service VM first allocates a 4-KByte page and passes
|
||||
the GPA (Guest Physical Address) of the buffer to the hypervisor. The buffer is
|
||||
used as an array of 16 I/O request slots with each I/O request slot being 256
|
||||
bytes. This array is indexed by vCPU ID.
|
||||
|
||||
2. I/O clients
|
||||
--------------
|
||||
|
||||
An I/O client is responsible for handling User VM I/O requests whose accessed
|
||||
GPA falls in a certain range. Multiple I/O clients can be associated with each
|
||||
User VM. There is a special client associated with each User VM, called the
|
||||
default client, that handles all I/O requests that do not fit into the range of
|
||||
any other clients. The ACRN userspace acts as the default client for each User
|
||||
VM.
|
||||
|
||||
Below illustration shows the relationship between I/O requests shared buffer,
|
||||
I/O requests and I/O clients.
|
||||
|
||||
::
|
||||
|
||||
+------------------------------------------------------+
|
||||
| Service VM |
|
||||
|+--------------------------------------------------+ |
|
||||
|| +----------------------------------------+ | |
|
||||
|| | shared page ACRN userspace | | |
|
||||
|| | +-----------------+ +------------+ | | |
|
||||
|| +----+->| acrn_io_request |<-+ default | | | |
|
||||
|| | | | +-----------------+ | I/O client | | | |
|
||||
|| | | | | ... | +------------+ | | |
|
||||
|| | | | +-----------------+ | | |
|
||||
|| | +-|--------------------------------------+ | |
|
||||
||---|----|-----------------------------------------| |
|
||||
|| | | kernel | |
|
||||
|| | | +----------------------+ | |
|
||||
|| | | | +-------------+ HSM | | |
|
||||
|| | +--------------+ | | | |
|
||||
|| | | | I/O clients | | | |
|
||||
|| | | | | | | |
|
||||
|| | | +-------------+ | | |
|
||||
|| | +----------------------+ | |
|
||||
|+---|----------------------------------------------+ |
|
||||
+----|-------------------------------------------------+
|
||||
|
|
||||
+----|-------------------------------------------------+
|
||||
| +-+-----------+ |
|
||||
| | I/O handler | ACRN Hypervisor |
|
||||
| +-------------+ |
|
||||
+------------------------------------------------------+
|
||||
|
||||
3. I/O request state transition
|
||||
-------------------------------
|
||||
|
||||
The state transitions of an ACRN I/O request are as follows.
|
||||
|
||||
::
|
||||
|
||||
FREE -> PENDING -> PROCESSING -> COMPLETE -> FREE -> ...
|
||||
|
||||
- FREE: this I/O request slot is empty
|
||||
- PENDING: a valid I/O request is pending in this slot
|
||||
- PROCESSING: the I/O request is being processed
|
||||
- COMPLETE: the I/O request has been processed
|
||||
|
||||
An I/O request in COMPLETE or FREE state is owned by the hypervisor. HSM and
|
||||
ACRN userspace are in charge of processing the others.
|
||||
|
||||
4. Processing flow of I/O requests
|
||||
----------------------------------
|
||||
|
||||
a. The I/O handler of the hypervisor will fill an I/O request with PENDING
|
||||
state when a trapped I/O access happens in a User VM.
|
||||
b. The hypervisor makes an upcall, which is a notification interrupt, to
|
||||
the Service VM.
|
||||
c. The upcall handler schedules a worker to dispatch I/O requests.
|
||||
d. The worker looks for the PENDING I/O requests, assigns them to different
|
||||
registered clients based on the address of the I/O accesses, updates
|
||||
their state to PROCESSING, and notifies the corresponding client to handle.
|
||||
e. The notified client handles the assigned I/O requests.
|
||||
f. The HSM updates I/O requests states to COMPLETE and notifies the hypervisor
|
||||
of the completion via hypercalls.
|
||||
|
|
@ -12,6 +12,7 @@ Linux Virtualization Support
|
|||
paravirt_ops
|
||||
guest-halt-polling
|
||||
ne_overview
|
||||
acrn/index
|
||||
|
||||
.. only:: html and subproject
|
||||
|
||||
|
|
|
|||
|
|
@ -50,7 +50,7 @@ PTE Page Table Helpers
|
|||
+---------------------------+--------------------------------------------------+
|
||||
| pte_mkwrite | Creates a writable PTE |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
| pte_mkwrprotect | Creates a write protected PTE |
|
||||
| pte_wrprotect | Creates a write protected PTE |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
| pte_mkspecial | Creates a special PTE |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
|
|
@ -120,7 +120,7 @@ PMD Page Table Helpers
|
|||
+---------------------------+--------------------------------------------------+
|
||||
| pmd_mkwrite | Creates a writable PMD |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
| pmd_mkwrprotect | Creates a write protected PMD |
|
||||
| pmd_wrprotect | Creates a write protected PMD |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
| pmd_mkspecial | Creates a special PMD |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
|
|
@ -186,7 +186,7 @@ PUD Page Table Helpers
|
|||
+---------------------------+--------------------------------------------------+
|
||||
| pud_mkwrite | Creates a writable PUD |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
| pud_mkwrprotect | Creates a write protected PUD |
|
||||
| pud_wrprotect | Creates a write protected PUD |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
| pud_mkdevmap | Creates a ZONE_DEVICE mapped PUD |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
|
|
@ -224,7 +224,7 @@ HugeTLB Page Table Helpers
|
|||
+---------------------------+--------------------------------------------------+
|
||||
| huge_pte_mkwrite | Creates a writable HugeTLB |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
| huge_pte_mkwrprotect | Creates a write protected HugeTLB |
|
||||
| huge_pte_wrprotect | Creates a write protected HugeTLB |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
| huge_ptep_get_and_clear | Clears a HugeTLB |
|
||||
+---------------------------+--------------------------------------------------+
|
||||
|
|
|
|||
44
MAINTAINERS
44
MAINTAINERS
|
|
@ -436,6 +436,15 @@ S: Orphan
|
|||
F: drivers/platform/x86/wmi.c
|
||||
F: include/uapi/linux/wmi.h
|
||||
|
||||
ACRN HYPERVISOR SERVICE MODULE
|
||||
M: Shuo Liu <shuo.a.liu@intel.com>
|
||||
L: acrn-dev@lists.projectacrn.org (subscribers-only)
|
||||
S: Supported
|
||||
W: https://projectacrn.org
|
||||
F: Documentation/virt/acrn/
|
||||
F: drivers/virt/acrn/
|
||||
F: include/uapi/linux/acrn.h
|
||||
|
||||
AD1889 ALSA SOUND DRIVER
|
||||
L: linux-parisc@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -1017,7 +1026,7 @@ F: Documentation/devicetree/bindings/mux/adi,adgs1408.txt
|
|||
F: drivers/mux/adgs1408.c
|
||||
|
||||
ANALOG DEVICES INC ADIN DRIVER
|
||||
M: Alexandru Ardelean <alexaundru.ardelean@analog.com>
|
||||
M: Michael Hennerich <michael.hennerich@analog.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
W: http://ez.analog.com/community/linux-device-drivers
|
||||
|
|
@ -1025,7 +1034,7 @@ F: Documentation/devicetree/bindings/net/adi,adin.yaml
|
|||
F: drivers/net/phy/adin.c
|
||||
|
||||
ANALOG DEVICES INC ADIS DRIVER LIBRARY
|
||||
M: Alexandru Ardelean <alexandru.ardelean@analog.com>
|
||||
M: Nuno Sa <nuno.sa@analog.com>
|
||||
L: linux-iio@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/iio/imu/adis.c
|
||||
|
|
@ -2569,7 +2578,7 @@ L: linux-kernel@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/clk/keystone/
|
||||
|
||||
ARM/TEXAS INSTRUMENT KEYSTONE ClOCKSOURCE
|
||||
ARM/TEXAS INSTRUMENT KEYSTONE CLOCKSOURCE
|
||||
M: Santosh Shilimkar <ssantosh@kernel.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
|
@ -3731,6 +3740,13 @@ L: netdev@vger.kernel.org
|
|||
S: Supported
|
||||
F: drivers/net/ethernet/broadcom/tg3.*
|
||||
|
||||
BROADCOM VK DRIVER
|
||||
M: Scott Branden <scott.branden@broadcom.com>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
S: Supported
|
||||
F: drivers/misc/bcm-vk/
|
||||
F: include/uapi/linux/misc/bcm_vk.h
|
||||
|
||||
BROCADE BFA FC SCSI DRIVER
|
||||
M: Anil Gurumurthy <anil.gurumurthy@qlogic.com>
|
||||
M: Sudarsana Kalluru <sudarsana.kalluru@qlogic.com>
|
||||
|
|
@ -6950,9 +6966,10 @@ M: Wu Hao <hao.wu@intel.com>
|
|||
R: Tom Rix <trix@redhat.com>
|
||||
L: linux-fpga@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/ABI/testing/sysfs-bus-dfl
|
||||
F: Documentation/ABI/testing/sysfs-bus-dfl*
|
||||
F: Documentation/fpga/dfl.rst
|
||||
F: drivers/fpga/dfl*
|
||||
F: include/linux/dfl.h
|
||||
F: include/uapi/linux/fpga-dfl.h
|
||||
|
||||
FPGA MANAGER FRAMEWORK
|
||||
|
|
@ -9112,9 +9129,7 @@ F: drivers/gpio/gpio-*cove.c
|
|||
INTEL PMIC MULTIFUNCTION DEVICE DRIVERS
|
||||
M: Andy Shevchenko <andy@kernel.org>
|
||||
S: Maintained
|
||||
F: drivers/mfd/intel_msic.c
|
||||
F: drivers/mfd/intel_soc_pmic*
|
||||
F: include/linux/mfd/intel_msic.h
|
||||
F: include/linux/mfd/intel_soc_pmic*
|
||||
|
||||
INTEL PMT DRIVER
|
||||
|
|
@ -13888,6 +13903,13 @@ S: Supported
|
|||
F: Documentation/devicetree/bindings/pci/mediatek*
|
||||
F: drivers/pci/controller/*mediatek*
|
||||
|
||||
PCIE DRIVER FOR MICROCHIP
|
||||
M: Daire McNamara <daire.mcnamara@microchip.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/devicetree/bindings/pci/microchip*
|
||||
F: drivers/pci/controller/*microchip*
|
||||
|
||||
PCIE DRIVER FOR QUALCOMM MSM
|
||||
M: Stanimir Varbanov <svarbanov@mm-sol.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
|
|
@ -14699,9 +14721,11 @@ M: Stuart Yoder <stuyoder@gmail.com>
|
|||
M: Laurentiu Tudor <laurentiu.tudor@nxp.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/ABI/stable/sysfs-bus-fsl-mc
|
||||
F: Documentation/devicetree/bindings/misc/fsl,qoriq-mc.txt
|
||||
F: Documentation/networking/device_drivers/ethernet/freescale/dpaa2/overview.rst
|
||||
F: drivers/bus/fsl-mc/
|
||||
F: include/uapi/linux/fsl_mc.h
|
||||
|
||||
QT1010 MEDIA DRIVER
|
||||
M: Antti Palosaari <crope@iki.fi>
|
||||
|
|
@ -16316,13 +16340,6 @@ S: Maintained
|
|||
F: Documentation/devicetree/bindings/i3c/silvaco,i3c-master.yaml
|
||||
F: drivers/i3c/master/svc-i3c-master.c
|
||||
|
||||
SIMPLE FIRMWARE INTERFACE (SFI)
|
||||
S: Obsolete
|
||||
W: http://simplefirmware.org/
|
||||
F: arch/x86/platform/sfi/
|
||||
F: drivers/sfi/
|
||||
F: include/linux/sfi*.h
|
||||
|
||||
SIMPLEFB FB DRIVER
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
|
|
@ -16744,6 +16761,7 @@ R: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
|
|||
R: Sanyog Kale <sanyog.r.kale@intel.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/soundwire.git
|
||||
F: Documentation/driver-api/soundwire/
|
||||
F: drivers/soundwire/
|
||||
F: include/linux/soundwire/
|
||||
|
|
|
|||
|
|
@ -821,6 +821,12 @@ config HAVE_IRQ_EXIT_ON_IRQ_STACK
|
|||
This spares a stack switch and improves cache usage on softirq
|
||||
processing.
|
||||
|
||||
config HAVE_SOFTIRQ_ON_OWN_STACK
|
||||
bool
|
||||
help
|
||||
Architecture provides a function to run __do_softirq() on a
|
||||
seperate stack.
|
||||
|
||||
config PGTABLE_LEVELS
|
||||
int
|
||||
default 2
|
||||
|
|
|
|||
|
|
@ -244,6 +244,7 @@ static inline const void *__tag_set(const void *addr, u8 tag)
|
|||
|
||||
#ifdef CONFIG_KASAN_HW_TAGS
|
||||
#define arch_enable_tagging() mte_enable_kernel()
|
||||
#define arch_set_tagging_report_once(state) mte_set_report_once(state)
|
||||
#define arch_init_tags(max_tag) mte_init_tags(max_tag)
|
||||
#define arch_get_random_tag() mte_get_random_tag()
|
||||
#define arch_get_mem_tag(addr) mte_get_mem_tag(addr)
|
||||
|
|
|
|||
|
|
@ -32,6 +32,9 @@ void *mte_set_mem_tag_range(void *addr, size_t size, u8 tag);
|
|||
void mte_enable_kernel(void);
|
||||
void mte_init_tags(u64 max_tag);
|
||||
|
||||
void mte_set_report_once(bool state);
|
||||
bool mte_report_once(void);
|
||||
|
||||
#else /* CONFIG_ARM64_MTE */
|
||||
|
||||
static inline u8 mte_get_ptr_tag(void *ptr)
|
||||
|
|
@ -60,6 +63,15 @@ static inline void mte_init_tags(u64 max_tag)
|
|||
{
|
||||
}
|
||||
|
||||
static inline void mte_set_report_once(bool state)
|
||||
{
|
||||
}
|
||||
|
||||
static inline bool mte_report_once(void)
|
||||
{
|
||||
return false;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_ARM64_MTE */
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
|
|
|||
|
|
@ -191,6 +191,7 @@
|
|||
#define SYS_GCR_EL1 sys_reg(3, 0, 1, 0, 6)
|
||||
|
||||
#define SYS_ZCR_EL1 sys_reg(3, 0, 1, 2, 0)
|
||||
#define SYS_TRFCR_EL1 sys_reg(3, 0, 1, 2, 1)
|
||||
|
||||
#define SYS_TTBR0_EL1 sys_reg(3, 0, 2, 0, 0)
|
||||
#define SYS_TTBR1_EL1 sys_reg(3, 0, 2, 0, 1)
|
||||
|
|
@ -475,6 +476,7 @@
|
|||
|
||||
#define SYS_SCTLR_EL2 sys_reg(3, 4, 1, 0, 0)
|
||||
#define SYS_ZCR_EL2 sys_reg(3, 4, 1, 2, 0)
|
||||
#define SYS_TRFCR_EL2 sys_reg(3, 4, 1, 2, 1)
|
||||
#define SYS_DACR32_EL2 sys_reg(3, 4, 3, 0, 0)
|
||||
#define SYS_SPSR_EL2 sys_reg(3, 4, 4, 0, 0)
|
||||
#define SYS_ELR_EL2 sys_reg(3, 4, 4, 0, 1)
|
||||
|
|
@ -833,6 +835,7 @@
|
|||
#define ID_AA64MMFR2_CNP_SHIFT 0
|
||||
|
||||
/* id_aa64dfr0 */
|
||||
#define ID_AA64DFR0_TRACE_FILT_SHIFT 40
|
||||
#define ID_AA64DFR0_DOUBLELOCK_SHIFT 36
|
||||
#define ID_AA64DFR0_PMSVER_SHIFT 32
|
||||
#define ID_AA64DFR0_CTX_CMPS_SHIFT 28
|
||||
|
|
@ -1013,6 +1016,14 @@
|
|||
/* Safe value for MPIDR_EL1: Bit31:RES1, Bit30:U:0, Bit24:MT:0 */
|
||||
#define SYS_MPIDR_SAFE_VAL (BIT(31))
|
||||
|
||||
#define TRFCR_ELx_TS_SHIFT 5
|
||||
#define TRFCR_ELx_TS_VIRTUAL ((0x1UL) << TRFCR_ELx_TS_SHIFT)
|
||||
#define TRFCR_ELx_TS_GUEST_PHYSICAL ((0x2UL) << TRFCR_ELx_TS_SHIFT)
|
||||
#define TRFCR_ELx_TS_PHYSICAL ((0x3UL) << TRFCR_ELx_TS_SHIFT)
|
||||
#define TRFCR_EL2_CX BIT(3)
|
||||
#define TRFCR_ELx_ExTRE BIT(1)
|
||||
#define TRFCR_ELx_E0TRE BIT(0)
|
||||
|
||||
#ifdef __ASSEMBLY__
|
||||
|
||||
.irp num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
|
||||
|
|
|
|||
|
|
@ -25,6 +25,8 @@
|
|||
|
||||
u64 gcr_kernel_excl __ro_after_init;
|
||||
|
||||
static bool report_fault_once = true;
|
||||
|
||||
static void mte_sync_page_tags(struct page *page, pte_t *ptep, bool check_swap)
|
||||
{
|
||||
pte_t old_pte = READ_ONCE(*ptep);
|
||||
|
|
@ -158,6 +160,16 @@ void mte_enable_kernel(void)
|
|||
isb();
|
||||
}
|
||||
|
||||
void mte_set_report_once(bool state)
|
||||
{
|
||||
WRITE_ONCE(report_fault_once, state);
|
||||
}
|
||||
|
||||
bool mte_report_once(void)
|
||||
{
|
||||
return READ_ONCE(report_fault_once);
|
||||
}
|
||||
|
||||
static void update_sctlr_el1_tcf0(u64 tcf0)
|
||||
{
|
||||
/* ISB required for the kernel uaccess routines */
|
||||
|
|
|
|||
|
|
@ -302,12 +302,24 @@ static void die_kernel_fault(const char *msg, unsigned long addr,
|
|||
static void report_tag_fault(unsigned long addr, unsigned int esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
bool is_write = ((esr & ESR_ELx_WNR) >> ESR_ELx_WNR_SHIFT) != 0;
|
||||
static bool reported;
|
||||
bool is_write;
|
||||
|
||||
if (READ_ONCE(reported))
|
||||
return;
|
||||
|
||||
/*
|
||||
* This is used for KASAN tests and assumes that no MTE faults
|
||||
* happened before running the tests.
|
||||
*/
|
||||
if (mte_report_once())
|
||||
WRITE_ONCE(reported, true);
|
||||
|
||||
/*
|
||||
* SAS bits aren't set for all faults reported in EL1, so we can't
|
||||
* find out access size.
|
||||
*/
|
||||
is_write = !!(esr & ESR_ELx_WNR);
|
||||
kasan_report(addr, 0, is_write, regs->pc);
|
||||
}
|
||||
#else
|
||||
|
|
@ -319,12 +331,8 @@ static inline void report_tag_fault(unsigned long addr, unsigned int esr,
|
|||
static void do_tag_recovery(unsigned long addr, unsigned int esr,
|
||||
struct pt_regs *regs)
|
||||
{
|
||||
static bool reported;
|
||||
|
||||
if (!READ_ONCE(reported)) {
|
||||
report_tag_fault(addr, esr, regs);
|
||||
WRITE_ONCE(reported, true);
|
||||
}
|
||||
report_tag_fault(addr, esr, regs);
|
||||
|
||||
/*
|
||||
* Disable MTE Tag Checking on the local CPU for the current EL.
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
CONFIG_SMP=y
|
||||
CONFIG_DEFAULT_MMAP_MIN_ADDR=0
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CROSS_COMPILE="hexagon-"
|
||||
CONFIG_LOCALVERSION="-smp"
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
|
|
|
|||
|
|
@ -517,12 +517,6 @@ extern struct page *zero_page_memmap_ptr;
|
|||
__changed; \
|
||||
})
|
||||
#endif
|
||||
|
||||
# ifdef CONFIG_VIRTUAL_MEM_MAP
|
||||
/* arch mem_map init routine is needed due to holes in a virtual mem_map */
|
||||
extern void memmap_init (unsigned long size, int nid, unsigned long zone,
|
||||
unsigned long start_pfn);
|
||||
# endif /* CONFIG_VIRTUAL_MEM_MAP */
|
||||
# endif /* !__ASSEMBLY__ */
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -536,18 +536,20 @@ virtual_memmap_init(u64 start, u64 end, void *arg)
|
|||
/ sizeof(struct page));
|
||||
|
||||
if (map_start < map_end)
|
||||
memmap_init_zone((unsigned long)(map_end - map_start),
|
||||
memmap_init_range((unsigned long)(map_end - map_start),
|
||||
args->nid, args->zone, page_to_pfn(map_start), page_to_pfn(map_end),
|
||||
MEMINIT_EARLY, NULL, MIGRATE_MOVABLE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __meminit
|
||||
memmap_init (unsigned long size, int nid, unsigned long zone,
|
||||
unsigned long start_pfn)
|
||||
void __meminit memmap_init_zone(struct zone *zone)
|
||||
{
|
||||
int nid = zone_to_nid(zone), zone_id = zone_idx(zone);
|
||||
unsigned long start_pfn = zone->zone_start_pfn;
|
||||
unsigned long size = zone->spanned_pages;
|
||||
|
||||
if (!vmem_map) {
|
||||
memmap_init_zone(size, nid, zone, start_pfn, start_pfn + size,
|
||||
memmap_init_range(size, nid, zone_id, start_pfn, start_pfn + size,
|
||||
MEMINIT_EARLY, NULL, MIGRATE_MOVABLE);
|
||||
} else {
|
||||
struct page *start;
|
||||
|
|
@ -557,7 +559,7 @@ memmap_init (unsigned long size, int nid, unsigned long zone,
|
|||
args.start = start;
|
||||
args.end = start + size;
|
||||
args.nid = nid;
|
||||
args.zone = zone;
|
||||
args.zone = zone_id;
|
||||
|
||||
efi_memmap_walk(virtual_memmap_init, &args);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -45,7 +45,6 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|||
pmd_t *pmdp, pmd_t pmd)
|
||||
{
|
||||
*pmdp = pmd;
|
||||
flush_tlb_all();
|
||||
}
|
||||
#endif /* defined(CONFIG_TRANSPARENT_HUGEPAGE) */
|
||||
|
||||
|
|
|
|||
|
|
@ -100,7 +100,6 @@ void set_pmd_at(struct mm_struct *mm, unsigned long addr,
|
|||
pmd_t *pmdp, pmd_t pmd)
|
||||
{
|
||||
*pmdp = pmd;
|
||||
flush_tlb_all();
|
||||
}
|
||||
|
||||
void __init pagetable_init(void)
|
||||
|
|
|
|||
|
|
@ -1,4 +1,3 @@
|
|||
CONFIG_CROSS_COMPILE="nds32le-linux-"
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ EXPORT_SYMBOL(elf_hwcap);
|
|||
|
||||
/*
|
||||
* The following string table, must sync with HWCAP_xx bitmask,
|
||||
* which is defined in <asm/procinfo.h>
|
||||
* which is defined above
|
||||
*/
|
||||
static const char *hwcap_str[] = {
|
||||
"mfusr_pc",
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
// Copyright (C) 2005-2017 Andes Technology Corporation
|
||||
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/of_clk.h>
|
||||
|
||||
void __init time_init(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -25,17 +25,8 @@ extern void show_pte(struct mm_struct *mm, unsigned long addr);
|
|||
void dump_mem(const char *lvl, unsigned long bottom, unsigned long top)
|
||||
{
|
||||
unsigned long first;
|
||||
mm_segment_t fs;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* We need to switch to kernel mode so that we can use __get_user
|
||||
* to safely read from kernel space. Note that we now dump the
|
||||
* code first, just in case the backtrace kills us.
|
||||
*/
|
||||
fs = get_fs();
|
||||
set_fs(KERNEL_DS);
|
||||
|
||||
pr_emerg("%s(0x%08lx to 0x%08lx)\n", lvl, bottom, top);
|
||||
|
||||
for (first = bottom & ~31; first < top; first += 32) {
|
||||
|
|
@ -48,7 +39,9 @@ void dump_mem(const char *lvl, unsigned long bottom, unsigned long top)
|
|||
for (p = first, i = 0; i < 8 && p < top; i++, p += 4) {
|
||||
if (p >= bottom && p < top) {
|
||||
unsigned long val;
|
||||
if (__get_user(val, (unsigned long *)p) == 0)
|
||||
|
||||
if (get_kernel_nofault(val,
|
||||
(unsigned long *)p) == 0)
|
||||
sprintf(str + i * 9, " %08lx", val);
|
||||
else
|
||||
sprintf(str + i * 9, " ????????");
|
||||
|
|
@ -56,46 +49,10 @@ void dump_mem(const char *lvl, unsigned long bottom, unsigned long top)
|
|||
}
|
||||
pr_emerg("%s%04lx:%s\n", lvl, first & 0xffff, str);
|
||||
}
|
||||
|
||||
set_fs(fs);
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(dump_mem);
|
||||
|
||||
static void dump_instr(struct pt_regs *regs)
|
||||
{
|
||||
unsigned long addr = instruction_pointer(regs);
|
||||
mm_segment_t fs;
|
||||
char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
|
||||
int i;
|
||||
|
||||
return;
|
||||
/*
|
||||
* We need to switch to kernel mode so that we can use __get_user
|
||||
* to safely read from kernel space. Note that we now dump the
|
||||
* code first, just in case the backtrace kills us.
|
||||
*/
|
||||
fs = get_fs();
|
||||
set_fs(KERNEL_DS);
|
||||
|
||||
pr_emerg("Code: ");
|
||||
for (i = -4; i < 1; i++) {
|
||||
unsigned int val, bad;
|
||||
|
||||
bad = __get_user(val, &((u32 *) addr)[i]);
|
||||
|
||||
if (!bad) {
|
||||
p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
|
||||
} else {
|
||||
p += sprintf(p, "bad PC value");
|
||||
break;
|
||||
}
|
||||
}
|
||||
pr_emerg("Code: %s\n", str);
|
||||
|
||||
set_fs(fs);
|
||||
}
|
||||
|
||||
#define LOOP_TIMES (100)
|
||||
static void __dump(struct task_struct *tsk, unsigned long *base_reg,
|
||||
const char *loglvl)
|
||||
|
|
@ -179,7 +136,6 @@ void die(const char *str, struct pt_regs *regs, int err)
|
|||
|
||||
if (!user_mode(regs) || in_interrupt()) {
|
||||
dump_mem("Stack: ", regs->sp, (regs->sp + PAGE_SIZE) & PAGE_MASK);
|
||||
dump_instr(regs);
|
||||
dump_stack();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -63,6 +63,7 @@ config PARISC
|
|||
select HAVE_FTRACE_MCOUNT_RECORD if HAVE_DYNAMIC_FTRACE
|
||||
select HAVE_KPROBES_ON_FTRACE
|
||||
select HAVE_DYNAMIC_FTRACE_WITH_REGS
|
||||
select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
|
||||
select SET_FS
|
||||
|
||||
help
|
||||
|
|
|
|||
|
|
@ -12,10 +12,6 @@
|
|||
#include <linux/threads.h>
|
||||
#include <linux/irq.h>
|
||||
|
||||
#ifdef CONFIG_IRQSTACKS
|
||||
#define __ARCH_HAS_DO_SOFTIRQ
|
||||
#endif
|
||||
|
||||
typedef struct {
|
||||
unsigned int __softirq_pending;
|
||||
unsigned int kernel_stack_usage;
|
||||
|
|
|
|||
|
|
@ -17,6 +17,7 @@
|
|||
#include <linux/types.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#include <asm/softirq_stack.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/ldcw.h>
|
||||
|
||||
|
|
|
|||
|
|
@ -235,6 +235,7 @@ config PPC
|
|||
select MMU_GATHER_PAGE_SIZE
|
||||
select HAVE_REGS_AND_STACK_ACCESS_API
|
||||
select HAVE_RELIABLE_STACKTRACE if PPC_BOOK3S_64 && CPU_LITTLE_ENDIAN
|
||||
select HAVE_SOFTIRQ_ON_OWN_STACK
|
||||
select HAVE_SYSCALL_TRACEPOINTS
|
||||
select HAVE_VIRT_CPU_ACCOUNTING
|
||||
select HAVE_IRQ_TIME_ACCOUNTING
|
||||
|
|
|
|||
|
|
@ -37,8 +37,6 @@ extern int distribute_irqs;
|
|||
|
||||
struct pt_regs;
|
||||
|
||||
#define __ARCH_HAS_DO_SOFTIRQ
|
||||
|
||||
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
|
||||
/*
|
||||
* Per-cpu stacks for handling critical, debug and machine check
|
||||
|
|
|
|||
|
|
@ -66,6 +66,7 @@
|
|||
#include <asm/livepatch.h>
|
||||
#include <asm/asm-prototypes.h>
|
||||
#include <asm/hw_irq.h>
|
||||
#include <asm/softirq_stack.h>
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
#include <asm/paca.h>
|
||||
|
|
|
|||
|
|
@ -184,6 +184,7 @@ config S390
|
|||
select HAVE_REGS_AND_STACK_ACCESS_API
|
||||
select HAVE_RELIABLE_STACKTRACE
|
||||
select HAVE_RSEQ
|
||||
select HAVE_SOFTIRQ_ON_OWN_STACK
|
||||
select HAVE_SYSCALL_TRACEPOINTS
|
||||
select HAVE_VIRT_CPU_ACCOUNTING
|
||||
select HAVE_VIRT_CPU_ACCOUNTING_IDLE
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ static inline int __test_facility(unsigned long nr, void *facilities)
|
|||
}
|
||||
|
||||
/*
|
||||
* The test_facility function uses the bit odering where the MSB is bit 0.
|
||||
* The test_facility function uses the bit ordering where the MSB is bit 0.
|
||||
* That makes it easier to query facility bits with the bit number as
|
||||
* documented in the Principles of Operation.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -18,7 +18,6 @@
|
|||
#define or_softirq_pending(x) (S390_lowcore.softirq_pending |= (x))
|
||||
|
||||
#define __ARCH_IRQ_STAT
|
||||
#define __ARCH_HAS_DO_SOFTIRQ
|
||||
#define __ARCH_IRQ_EXIT_IRQS_DISABLED
|
||||
|
||||
static inline void ack_bad_irq(unsigned int irq)
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
#include <asm/irq.h>
|
||||
#include <asm/hw_irq.h>
|
||||
#include <asm/stacktrace.h>
|
||||
#include <asm/softirq_stack.h>
|
||||
#include "entry.h"
|
||||
|
||||
DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
|
||||
|
|
|
|||
|
|
@ -54,6 +54,7 @@ config SUPERH
|
|||
select HAVE_PERF_EVENTS
|
||||
select HAVE_REGS_AND_STACK_ACCESS_API
|
||||
select HAVE_UID16
|
||||
select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
|
||||
select HAVE_STACKPROTECTOR
|
||||
select HAVE_SYSCALL_TRACEPOINTS
|
||||
select IRQ_FORCED_THREADING
|
||||
|
|
|
|||
|
|
@ -51,7 +51,6 @@ asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
|
|||
#ifdef CONFIG_IRQSTACKS
|
||||
extern void irq_ctx_init(int cpu);
|
||||
extern void irq_ctx_exit(int cpu);
|
||||
# define __ARCH_HAS_DO_SOFTIRQ
|
||||
#else
|
||||
# define irq_ctx_init(cpu) do { } while (0)
|
||||
# define irq_ctx_exit(cpu) do { } while (0)
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/uaccess.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <cpu/mmu_context.h>
|
||||
#include <asm/softirq_stack.h>
|
||||
|
||||
atomic_t irq_err_count;
|
||||
|
||||
|
|
|
|||
|
|
@ -96,6 +96,7 @@ config SPARC64
|
|||
select ARCH_HAS_PTE_SPECIAL
|
||||
select PCI_DOMAINS if PCI
|
||||
select ARCH_HAS_GIGANTIC_PAGE
|
||||
select HAVE_SOFTIRQ_ON_OWN_STACK
|
||||
|
||||
config ARCH_PROC_KCORE_TEXT
|
||||
def_bool y
|
||||
|
|
|
|||
|
|
@ -93,7 +93,6 @@ void arch_trigger_cpumask_backtrace(const struct cpumask *mask,
|
|||
|
||||
extern void *hardirq_stack[NR_CPUS];
|
||||
extern void *softirq_stack[NR_CPUS];
|
||||
#define __ARCH_HAS_DO_SOFTIRQ
|
||||
|
||||
#define NO_IRQ 0xffffffff
|
||||
|
||||
|
|
|
|||
|
|
@ -42,6 +42,7 @@
|
|||
#include <asm/head.h>
|
||||
#include <asm/hypervisor.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/softirq_stack.h>
|
||||
|
||||
#include "entry.h"
|
||||
#include "cpumap.h"
|
||||
|
|
|
|||
|
|
@ -20,6 +20,7 @@ generic-y += param.h
|
|||
generic-y += pci.h
|
||||
generic-y += percpu.h
|
||||
generic-y += preempt.h
|
||||
generic-y += softirq_stack.h
|
||||
generic-y += switch_to.h
|
||||
generic-y += topology.h
|
||||
generic-y += trace_clock.h
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user