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tools/power turbostat: Cleanup: consistently use warn/err, not perror
Acknowledge that get_msr() always errs out on failure by returning void and deleting checks for its return value. Replace all perror() with warn(). Replace all perror()/exit() with err(). No functional change, unless you count the uniform return value of -1 on calloc failure. Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Len Brown <len.brown@intel.com>
This commit is contained in:
Len Brown
parent
12f841ec7b
commit
3bbe42ac51
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@ -589,7 +589,7 @@ struct gfx_sysfs_info {
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static struct gfx_sysfs_info gfx_info[GFX_MAX];
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int get_msr(int cpu, off_t offset, unsigned long long *msr);
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void get_msr(int cpu, off_t offset, unsigned long long *msr);
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int add_counter(unsigned int msr_num, const char *path, const char *name,
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unsigned int width, enum counter_scope scope, enum counter_type type, enum counter_format format, int flags, int id);
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@ -648,8 +648,7 @@ double slm_bclk(void)
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unsigned int i;
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double freq;
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if (get_msr(master_cpu, MSR_FSB_FREQ, &msr))
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fprintf(outf, "SLM BCLK: unknown\n");
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get_msr(master_cpu, MSR_FSB_FREQ, &msr);
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i = msr & 0xf;
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if (i >= SLM_BCLK_FREQS) {
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@ -2647,18 +2646,12 @@ int get_instr_count_fd(int cpu)
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return fd_instr_count_percpu[cpu];
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}
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int get_msr(int cpu, off_t offset, unsigned long long *msr)
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void get_msr(int cpu, off_t offset, unsigned long long *msr)
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{
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ssize_t retval;
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assert(!no_msr);
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retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
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if (retval != sizeof *msr)
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if (pread(get_msr_fd(cpu), msr, sizeof(*msr), offset) != sizeof(*msr))
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err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
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return 0;
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}
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int add_msr_counter(int cpu, off_t offset)
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@ -4552,8 +4545,7 @@ int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp, char *
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{
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if (mp->msr_num != 0) {
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assert(!no_msr);
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if (get_msr(cpu, mp->msr_num, counterp))
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return -1;
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get_msr(cpu, mp->msr_num, counterp);
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} else {
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char path[128 + PATH_BYTES];
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@ -4917,13 +4909,10 @@ int get_rapl_counters(int cpu, unsigned int domain, struct core_data *c, struct
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fprintf(stderr, "Reading rapl counter via msr at %u\n", i);
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assert(!no_msr);
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if (rci->flags[i] & RAPL_COUNTER_FLAG_USE_MSR_SUM) {
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if (get_msr_sum(cpu, rci->msr[i], &rci->data[i]))
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return -13 - i;
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} else {
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if (get_msr(cpu, rci->msr[i], &rci->data[i]))
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return -13 - i;
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}
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if (rci->flags[i] & RAPL_COUNTER_FLAG_USE_MSR_SUM)
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get_msr_sum(cpu, rci->msr[i], &rci->data[i]);
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else
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get_msr(cpu, rci->msr[i], &rci->data[i]);
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rci->data[i] &= rci->msr_mask[i];
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if (rci->msr_shift[i] >= 0)
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@ -5052,8 +5041,7 @@ int get_cstate_counters(unsigned int cpu, PER_THREAD_PARAMS)
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case COUNTER_SOURCE_MSR:
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assert(!no_msr);
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if (get_msr(cpu, cci->msr[i], &cci->data[i]))
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return -13 - i;
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get_msr(cpu, cci->msr[i], &cci->data[i]);
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if (debug >= 2)
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fprintf(stderr, "cstate via %s0x%llx %u: %llu\n", "msr", cci->msr[i], i, cci->data[i]);
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@ -5151,8 +5139,7 @@ int get_smi_aperf_mperf(unsigned int cpu, struct thread_data *t)
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case COUNTER_SOURCE_MSR:
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assert(!no_msr);
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if (get_msr(cpu, mci->msr[i], &mci->data[i]))
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return -2 - i;
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get_msr(cpu, mci->msr[i], &mci->data[i]);
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mci->data[i] &= mci->msr_mask[i];
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@ -5317,12 +5304,10 @@ int get_counters(PER_THREAD_PARAMS)
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}
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if (DO_BIC(BIC_Mod_c6))
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if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
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return -8;
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get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us);
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if (DO_BIC(BIC_CoreTmp)) {
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if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
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return -9;
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get_msr(cpu, MSR_IA32_THERM_STATUS, &msr);
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c->core_temp_c = tj_max - ((msr >> 16) & 0x7F);
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}
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@ -5344,22 +5329,14 @@ int get_counters(PER_THREAD_PARAMS)
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if (!is_cpu_first_core_in_package(t, p))
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goto done;
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if (DO_BIC(BIC_Totl_c0)) {
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if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
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return -10;
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}
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if (DO_BIC(BIC_Any_c0)) {
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if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
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return -11;
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}
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if (DO_BIC(BIC_GFX_c0)) {
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if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
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return -12;
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}
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if (DO_BIC(BIC_CPUGFX)) {
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if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
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return -13;
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}
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if (DO_BIC(BIC_Totl_c0))
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get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0);
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if (DO_BIC(BIC_Any_c0))
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get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0);
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if (DO_BIC(BIC_GFX_c0))
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get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0);
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if (DO_BIC(BIC_CPUGFX))
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get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0);
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if (DO_BIC(BIC_CPU_LPI))
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p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
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@ -5373,8 +5350,7 @@ int get_counters(PER_THREAD_PARAMS)
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}
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if (DO_BIC(BIC_PkgTmp)) {
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if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
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return -17;
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get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr);
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p->pkg_temp_c = tj_max - ((msr >> 16) & 0x7F);
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}
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@ -6712,7 +6688,7 @@ void do_sleep(void)
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int get_msr_sum(int cpu, off_t offset, unsigned long long *msr)
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{
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int ret, idx;
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int idx;
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unsigned long long msr_cur, msr_last;
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assert(!no_msr);
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@ -6724,9 +6700,7 @@ int get_msr_sum(int cpu, off_t offset, unsigned long long *msr)
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if (idx < 0)
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return idx;
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/* get_msr_sum() = sum + (get_msr() - last) */
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ret = get_msr(cpu, offset, &msr_cur);
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if (ret)
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return ret;
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get_msr(cpu, offset, &msr_cur);
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msr_last = per_cpu_msr_sum[cpu].entries[idx].last;
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DELTA_WRAP32(msr_cur, msr_last);
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*msr = msr_last + per_cpu_msr_sum[cpu].entries[idx].sum;
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@ -6739,7 +6713,7 @@ timer_t timerid;
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/* Timer callback, update the sum of MSRs periodically. */
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static int update_msr_sum(PER_THREAD_PARAMS)
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{
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int i, ret;
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int i;
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int cpu = t->cpu_id;
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UNUSED(c);
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@ -6756,11 +6730,7 @@ static int update_msr_sum(PER_THREAD_PARAMS)
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offset = idx_to_offset(i);
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if (offset < 0)
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continue;
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ret = get_msr(cpu, offset, &msr_cur);
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if (ret) {
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fprintf(outf, "Can not update msr(0x%llx)\n", (unsigned long long)offset);
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continue;
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}
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get_msr(cpu, offset, &msr_cur);
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msr_last = per_cpu_msr_sum[cpu].entries[i].last;
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per_cpu_msr_sum[cpu].entries[i].last = msr_cur & 0xffffffff;
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@ -7612,27 +7582,21 @@ int print_hwp(PER_THREAD_PARAMS)
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return -1;
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}
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if (get_msr(cpu, MSR_PM_ENABLE, &msr))
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return 0;
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get_msr(cpu, MSR_PM_ENABLE, &msr);
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fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n", cpu, msr, (msr & (1 << 0)) ? "" : "No-");
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/* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
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if ((msr & (1 << 0)) == 0)
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return 0;
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if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
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return 0;
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get_msr(cpu, MSR_HWP_CAPABILITIES, &msr);
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fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
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"(high %d guar %d eff %d low %d)\n",
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cpu, msr,
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(unsigned int)HWP_HIGHEST_PERF(msr),
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(unsigned int)HWP_GUARANTEED_PERF(msr), (unsigned int)HWP_MOSTEFFICIENT_PERF(msr), (unsigned int)HWP_LOWEST_PERF(msr));
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if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
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return 0;
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get_msr(cpu, MSR_HWP_REQUEST, &msr);
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fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
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"(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
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cpu, msr,
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@ -7642,9 +7606,7 @@ int print_hwp(PER_THREAD_PARAMS)
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(unsigned int)(((msr) >> 24) & 0xff), (unsigned int)(((msr) >> 32) & 0xff3), (unsigned int)(((msr) >> 42) & 0x1));
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if (has_hwp_pkg) {
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if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
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return 0;
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get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr);
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fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
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"(min %d max %d des %d epp 0x%x window 0x%x)\n",
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cpu, msr,
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@ -7653,15 +7615,11 @@ int print_hwp(PER_THREAD_PARAMS)
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(unsigned int)(((msr) >> 16) & 0xff), (unsigned int)(((msr) >> 24) & 0xff), (unsigned int)(((msr) >> 32) & 0xff3));
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}
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if (has_hwp_notify) {
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if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
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return 0;
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get_msr(cpu, MSR_HWP_INTERRUPT, &msr);
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fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
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"(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n", cpu, msr, ((msr) & 0x1) ? "EN" : "Dis", ((msr) & 0x2) ? "EN" : "Dis");
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}
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if (get_msr(cpu, MSR_HWP_STATUS, &msr))
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return 0;
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get_msr(cpu, MSR_HWP_STATUS, &msr);
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fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
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"(%sGuaranteed_Perf_Change, %sExcursion_Min)\n", cpu, msr, ((msr) & 0x1) ? "" : "No-", ((msr) & 0x4) ? "" : "No-");
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@ -7774,9 +7732,10 @@ double get_tdp_intel(void)
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{
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unsigned long long msr;
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if (valid_rapl_msrs & RAPL_PKG_POWER_INFO)
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if (!get_msr(master_cpu, MSR_PKG_POWER_INFO, &msr))
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return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
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if (valid_rapl_msrs & RAPL_PKG_POWER_INFO) {
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get_msr(master_cpu, MSR_PKG_POWER_INFO, &msr);
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return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
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}
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return get_quirk_tdp();
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}
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@ -7814,8 +7773,7 @@ void rapl_probe_intel(void)
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CLR_BIC(BIC_RAM__, &bic_enabled);
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/* units on package 0, verify later other packages match */
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if (get_msr(master_cpu, MSR_RAPL_POWER_UNIT, &msr))
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return;
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get_msr(master_cpu, MSR_RAPL_POWER_UNIT, &msr);
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rapl_power_units = 1.0 / (1 << (msr & 0xF));
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if (platform->has_rapl_divisor)
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@ -7862,9 +7820,7 @@ void rapl_probe_amd(void)
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if (!valid_rapl_msrs || no_msr)
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return;
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if (get_msr(master_cpu, MSR_RAPL_PWR_UNIT, &msr))
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return;
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get_msr(master_cpu, MSR_RAPL_PWR_UNIT, &msr);
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rapl_time_units = ldexp(1.0, -(msr >> 16 & 0xf));
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rapl_energy_units = ldexp(1.0, -(msr >> 8 & 0x1f));
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rapl_power_units = ldexp(1.0, -(msr & 0xf));
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@ -8020,7 +7976,7 @@ static int print_rapl_sysfs(void)
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snprintf(path, PATH_MAX, "%s/%s", PATH_RAPL_SYSFS, entry->d_name);
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if ((cdir = opendir(path)) == NULL) {
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perror("opendir() error");
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warn("%s", path);
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return 1;
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}
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@ -8063,21 +8019,17 @@ int print_rapl(PER_THREAD_PARAMS)
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if (valid_rapl_msrs & RAPL_AMD_F17H) {
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msr_name = "MSR_RAPL_PWR_UNIT";
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if (get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr))
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return -1;
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get_msr(cpu, MSR_RAPL_PWR_UNIT, &msr);
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} else {
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msr_name = "MSR_RAPL_POWER_UNIT";
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if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
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return -1;
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get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr);
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}
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fprintf(outf, "cpu%d: %s: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr_name, msr, rapl_power_units, rapl_energy_units, rapl_time_units);
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if (valid_rapl_msrs & RAPL_PKG_POWER_INFO) {
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if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
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return -5;
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get_msr(cpu, MSR_PKG_POWER_INFO, &msr);
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fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
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cpu, msr,
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((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
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@ -8087,9 +8039,7 @@ int print_rapl(PER_THREAD_PARAMS)
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}
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if (valid_rapl_msrs & RAPL_PKG) {
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if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
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return -9;
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get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr);
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fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr >> 63) & 1 ? "" : "UN");
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print_power_limit_msr(cpu, msr, "PKG Limit #1");
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@ -8099,17 +8049,13 @@ int print_rapl(PER_THREAD_PARAMS)
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((msr >> 32) & 0x7FFF) * rapl_power_units,
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(1.0 + (((msr >> 54) & 0x3) / 4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units, ((msr >> 48) & 1) ? "EN" : "DIS");
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if (get_msr(cpu, MSR_VR_CURRENT_CONFIG, &msr))
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return -9;
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get_msr(cpu, MSR_VR_CURRENT_CONFIG, &msr);
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fprintf(outf, "cpu%d: MSR_VR_CURRENT_CONFIG: 0x%08llx\n", cpu, msr);
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fprintf(outf, "cpu%d: PKG Limit #4: %f Watts (%slocked)\n", cpu, ((msr >> 0) & 0x1FFF) * rapl_power_units, (msr >> 31) & 1 ? "" : "UN");
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}
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if (valid_rapl_msrs & RAPL_DRAM_POWER_INFO) {
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if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
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return -6;
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get_msr(cpu, MSR_DRAM_POWER_INFO, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
|
||||
cpu, msr,
|
||||
((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
|
||||
|
|
@ -8117,32 +8063,25 @@ int print_rapl(PER_THREAD_PARAMS)
|
|||
((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units, ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
|
||||
}
|
||||
if (valid_rapl_msrs & RAPL_DRAM) {
|
||||
if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
|
||||
return -9;
|
||||
get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr >> 31) & 1 ? "" : "UN");
|
||||
|
||||
print_power_limit_msr(cpu, msr, "DRAM Limit");
|
||||
}
|
||||
if (valid_rapl_msrs & RAPL_CORE_POLICY) {
|
||||
if (get_msr(cpu, MSR_PP0_POLICY, &msr))
|
||||
return -7;
|
||||
|
||||
get_msr(cpu, MSR_PP0_POLICY, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
|
||||
}
|
||||
if (valid_rapl_msrs & RAPL_CORE_POWER_LIMIT) {
|
||||
if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
|
||||
return -9;
|
||||
get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr >> 31) & 1 ? "" : "UN");
|
||||
print_power_limit_msr(cpu, msr, "Cores Limit");
|
||||
}
|
||||
if (valid_rapl_msrs & RAPL_GFX) {
|
||||
if (get_msr(cpu, MSR_PP1_POLICY, &msr))
|
||||
return -8;
|
||||
|
||||
get_msr(cpu, MSR_PP1_POLICY, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
|
||||
|
||||
if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
|
||||
return -9;
|
||||
get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n", cpu, msr, (msr >> 31) & 1 ? "" : "UN");
|
||||
print_power_limit_msr(cpu, msr, "GFX Limit");
|
||||
}
|
||||
|
|
@ -8157,7 +8096,6 @@ int print_rapl(PER_THREAD_PARAMS)
|
|||
*/
|
||||
void probe_rapl_msrs(void)
|
||||
{
|
||||
int ret;
|
||||
off_t offset;
|
||||
unsigned long long msr_value;
|
||||
|
||||
|
|
@ -8171,12 +8109,7 @@ void probe_rapl_msrs(void)
|
|||
if (offset < 0)
|
||||
return;
|
||||
|
||||
ret = get_msr(master_cpu, offset, &msr_value);
|
||||
if (ret) {
|
||||
if (debug)
|
||||
fprintf(outf, "Can not read RAPL_PKG_ENERGY MSR(0x%llx)\n", (unsigned long long)offset);
|
||||
return;
|
||||
}
|
||||
get_msr(master_cpu, offset, &msr_value);
|
||||
if (msr_value == 0) {
|
||||
if (debug)
|
||||
fprintf(outf, "RAPL_PKG_ENERGY MSR(0x%llx) == ZERO: disabling all RAPL MSRs\n", (unsigned long long)offset);
|
||||
|
|
@ -8256,17 +8189,17 @@ int set_temperature_target(PER_THREAD_PARAMS)
|
|||
if (!platform->has_nhm_msrs || no_msr)
|
||||
goto guess;
|
||||
|
||||
if (get_msr(master_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
|
||||
goto guess;
|
||||
|
||||
get_msr(master_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr);
|
||||
tcc_default = (msr >> 16) & 0xFF;
|
||||
|
||||
if (!quiet) {
|
||||
int bits = platform->tcc_offset_bits;
|
||||
unsigned long long enabled = 0;
|
||||
|
||||
if (bits && !get_msr(master_cpu, MSR_PLATFORM_INFO, &enabled))
|
||||
if (bits) {
|
||||
get_msr(master_cpu, MSR_PLATFORM_INFO, &enabled);
|
||||
enabled = (enabled >> 30) & 1;
|
||||
}
|
||||
|
||||
if (bits && enabled) {
|
||||
tcc_offset = (msr >> 24) & GENMASK(bits - 1, 0);
|
||||
|
|
@ -8318,15 +8251,11 @@ int print_thermal(PER_THREAD_PARAMS)
|
|||
}
|
||||
|
||||
if (do_ptm && is_cpu_first_core_in_package(t, p)) {
|
||||
if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
|
||||
return 0;
|
||||
|
||||
get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr);
|
||||
dts = (msr >> 16) & 0x7F;
|
||||
fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n", cpu, msr, tj_max - dts);
|
||||
|
||||
if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
|
||||
return 0;
|
||||
|
||||
get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr);
|
||||
dts = (msr >> 16) & 0x7F;
|
||||
dts2 = (msr >> 8) & 0x7F;
|
||||
fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", cpu, msr, tj_max - dts, tj_max - dts2);
|
||||
|
|
@ -8335,16 +8264,12 @@ int print_thermal(PER_THREAD_PARAMS)
|
|||
if (do_dts && debug) {
|
||||
unsigned int resolution;
|
||||
|
||||
if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
|
||||
return 0;
|
||||
|
||||
get_msr(cpu, MSR_IA32_THERM_STATUS, &msr);
|
||||
dts = (msr >> 16) & 0x7F;
|
||||
resolution = (msr >> 27) & 0xF;
|
||||
fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n", cpu, msr, tj_max - dts, resolution);
|
||||
|
||||
if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
|
||||
return 0;
|
||||
|
||||
get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr);
|
||||
dts = (msr >> 16) & 0x7F;
|
||||
dts2 = (msr >> 8) & 0x7F;
|
||||
fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n", cpu, msr, tj_max - dts, tj_max - dts2);
|
||||
|
|
@ -8403,9 +8328,9 @@ void decode_feature_control_msr(void)
|
|||
if (quiet)
|
||||
return;
|
||||
|
||||
if (!get_msr(master_cpu, MSR_IA32_FEAT_CTL, &msr))
|
||||
fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
|
||||
master_cpu, msr, msr & FEAT_CTL_LOCKED ? "" : "UN-", msr & (1 << 18) ? "SGX" : "");
|
||||
get_msr(master_cpu, MSR_IA32_FEAT_CTL, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
|
||||
master_cpu, msr, msr & FEAT_CTL_LOCKED ? "" : "UN-", msr & (1 << 18) ? "SGX" : "");
|
||||
}
|
||||
|
||||
void decode_misc_enable_msr(void)
|
||||
|
|
@ -8418,13 +8343,13 @@ void decode_misc_enable_msr(void)
|
|||
if (!genuine_intel)
|
||||
return;
|
||||
|
||||
if (!get_msr(master_cpu, MSR_IA32_MISC_ENABLE, &msr))
|
||||
fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
|
||||
master_cpu, msr,
|
||||
msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
|
||||
msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
|
||||
msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
|
||||
msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "", msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
|
||||
get_msr(master_cpu, MSR_IA32_MISC_ENABLE, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
|
||||
master_cpu, msr,
|
||||
msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
|
||||
msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
|
||||
msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
|
||||
msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "", msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
|
||||
}
|
||||
|
||||
void decode_misc_feature_control(void)
|
||||
|
|
@ -8437,10 +8362,10 @@ void decode_misc_feature_control(void)
|
|||
if (!platform->has_msr_misc_feature_control)
|
||||
return;
|
||||
|
||||
if (!get_msr(master_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
|
||||
fprintf(outf,
|
||||
"cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
|
||||
master_cpu, msr, msr & (0 << 0) ? "No-" : "", msr & (1 << 0) ? "No-" : "", msr & (2 << 0) ? "No-" : "", msr & (3 << 0) ? "No-" : "");
|
||||
get_msr(master_cpu, MSR_MISC_FEATURE_CONTROL, &msr);
|
||||
fprintf(outf,
|
||||
"cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
|
||||
master_cpu, msr, msr & (0 << 0) ? "No-" : "", msr & (1 << 0) ? "No-" : "", msr & (2 << 0) ? "No-" : "", msr & (3 << 0) ? "No-" : "");
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -8460,9 +8385,9 @@ void decode_misc_pwr_mgmt_msr(void)
|
|||
if (!platform->has_msr_misc_pwr_mgmt)
|
||||
return;
|
||||
|
||||
if (!get_msr(master_cpu, MSR_MISC_PWR_MGMT, &msr))
|
||||
fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
|
||||
master_cpu, msr, msr & (1 << 0) ? "DIS" : "EN", msr & (1 << 1) ? "EN" : "DIS", msr & (1 << 8) ? "EN" : "DIS");
|
||||
get_msr(master_cpu, MSR_MISC_PWR_MGMT, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
|
||||
master_cpu, msr, msr & (1 << 0) ? "DIS" : "EN", msr & (1 << 1) ? "EN" : "DIS", msr & (1 << 8) ? "EN" : "DIS");
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -8481,11 +8406,11 @@ void decode_c6_demotion_policy_msr(void)
|
|||
if (!platform->has_msr_c6_demotion_policy_config)
|
||||
return;
|
||||
|
||||
if (!get_msr(master_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
|
||||
fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
|
||||
get_msr(master_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n", master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
|
||||
|
||||
if (!get_msr(master_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
|
||||
fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
|
||||
get_msr(master_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr);
|
||||
fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n", master_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
|
||||
}
|
||||
|
||||
void print_dev_latency(void)
|
||||
|
|
@ -9186,13 +9111,10 @@ void process_cpuid()
|
|||
cpuid_has_hv = ecx_flags & (1 << 31);
|
||||
|
||||
if (!no_msr) {
|
||||
if (get_msr(sched_getcpu(), MSR_IA32_UCODE_REV, &ucode_patch)) {
|
||||
warnx("get_msr(UCODE)");
|
||||
} else {
|
||||
ucode_patch_valid = true;
|
||||
if (!authentic_amd && !hygon_genuine)
|
||||
ucode_patch >>= 32;
|
||||
}
|
||||
get_msr(sched_getcpu(), MSR_IA32_UCODE_REV, &ucode_patch);
|
||||
ucode_patch_valid = true;
|
||||
if (!authentic_amd && !hygon_genuine)
|
||||
ucode_patch >>= 32;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -10821,10 +10743,8 @@ int add_counter(unsigned int msr_num, const char *path, const char *name,
|
|||
struct sysfs_path *sp;
|
||||
|
||||
sp = calloc(1, sizeof(struct sysfs_path));
|
||||
if (sp == NULL) {
|
||||
perror("calloc");
|
||||
exit(1);
|
||||
}
|
||||
if (sp == NULL)
|
||||
err(-1, "%s", path);
|
||||
strncpy(sp->path, path, PATH_BYTES - 1);
|
||||
sp->id = id;
|
||||
sp->next = msrp->sp;
|
||||
|
|
@ -11760,7 +11680,7 @@ int main(int argc, char **argv)
|
|||
|
||||
ret = write(fd, "0\n", 2);
|
||||
if (ret == -1)
|
||||
perror("Can't update cgroup\n");
|
||||
warn("/sys/fs/cgroup/cgroup.procs");
|
||||
|
||||
close(fd);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user