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dt-bindings: pinctrl: convert pinctrl-mcp23s08.txt to yaml format
YAML binding file provides the conversion of the original text-based binding for the pinctrl-mcp23s08 to microchip,mcp23s08.yaml. following compatible strings using the deprecated mcp prefix have been removed from this binding: - mcp,mcp23s08 - mcp,mcp23s17 - mcp,mcp23008 - mcp,mcp23017 Signed-off-by: Himanshu Bhavani <himanshu.bhavani@siliconsignals.io> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20241028063939.6276-1-himanshu.bhavani@siliconsignals.io Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Himanshu Bhavani
Linus Walleij
parent
1aad42abae
commit
3ad8d3ec6d
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# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/microchip,mcp23s08.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip I/O expander with serial interface (I2C/SPI)
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maintainers:
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- Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
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description:
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Microchip MCP23008, MCP23017, MCP23S08, MCP23S17, MCP23S18 GPIO expander
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chips.These chips provide 8 or 16 GPIO pins with either I2C or SPI interface.
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allOf:
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- $ref: /schemas/spi/spi-peripheral-props.yaml#
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properties:
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compatible:
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enum:
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- microchip,mcp23s08
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- microchip,mcp23s17
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- microchip,mcp23s18
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- microchip,mcp23008
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- microchip,mcp23017
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- microchip,mcp23018
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reg:
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maxItems: 1
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gpio-controller: true
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'#gpio-cells':
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const: 2
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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interrupts:
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maxItems: 1
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reset-gpios:
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description: GPIO specifier for active-low reset pin.
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maxItems: 1
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microchip,spi-present-mask:
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description:
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Multiple SPI chips can share the same SPI chipselect. Set a bit in
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bit0-7 in this mask to 1 if there is a chip connected with the
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corresponding spi address set. For example if you have a chip with
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address 3 connected, you have to set bit3 to 1, which is 0x08. mcp23s08
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chip variant only supports bits 0-3. It is not possible to mix mcp23s08
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and mcp23s17 on the same chipselect. Set at least one bit to 1 for SPI
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chips.
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$ref: /schemas/types.yaml#/definitions/uint8
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microchip,irq-mirror:
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type: boolean
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description:
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Sets the mirror flag in the IOCON register. Devices with two interrupt
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outputs (these are the devices ending with 17 and those that have 16 IOs)
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have two IO banks IO 0-7 form bank 1 and IO 8-15 are bank 2. These chips
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have two different interrupt outputs One for bank 1 and another for
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bank 2. If irq-mirror is set, both interrupts are generated regardless of
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the bank that an input change occurred on. If it is not set,the interrupt
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are only generated for the bank they belong to.
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microchip,irq-active-high:
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type: boolean
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description:
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Sets the INTPOL flag in the IOCON register.This configures the IRQ output
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polarity as active high.
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drive-open-drain:
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type: boolean
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description:
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Sets the ODR flag in the IOCON register. This configures the IRQ output as
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open drain active low.
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pinmux:
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type: object
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properties:
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pins:
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description:
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The list of GPIO pins controlled by this node. Each pin name
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corresponds to a physical pin on the GPIO expander.
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items:
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pattern: '^gpio([0-9]|[1][0-5])$'
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maxItems: 16
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bias-pull-up:
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type: boolean
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description:
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Configures pull-up resistors for the GPIO pins. Absence of this
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property will leave the configuration in its default state.
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required:
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- pins
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additionalProperties: false
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required:
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- compatible
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- reg
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- gpio-controller
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- '#gpio-cells'
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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gpio@21 {
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compatible = "microchip,mcp23017";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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microchip,irq-mirror;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c_gpio0>, <&gpiopullups>;
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reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
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gpiopullups: pinmux {
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pins = "gpio0", "gpio1", "gpio2", "gpio3",
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"gpio4", "gpio5", "gpio6", "gpio7",
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"gpio8", "gpio9", "gpio10", "gpio11",
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"gpio12", "gpio13", "gpio14", "gpio15";
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bias-pull-up;
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};
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};
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};
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- |
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spi {
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#address-cells = <1>;
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#size-cells = <0>;
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gpio@0 {
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compatible = "microchip,mcp23s17";
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reg = <0>;
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gpio-controller;
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#gpio-cells = <2>;
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spi-max-frequency = <1000000>;
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microchip,spi-present-mask = /bits/ 8 <0x01>;
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};
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};
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@ -1,148 +0,0 @@
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Microchip MCP2308/MCP23S08/MCP23017/MCP23S17 driver for
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8-/16-bit I/O expander with serial interface (I2C/SPI)
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Required properties:
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- compatible : Should be
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- "mcp,mcp23s08" (DEPRECATED) for 8 GPIO SPI version
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- "mcp,mcp23s17" (DEPRECATED) for 16 GPIO SPI version
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- "mcp,mcp23008" (DEPRECATED) for 8 GPIO I2C version or
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- "mcp,mcp23017" (DEPRECATED) for 16 GPIO I2C version of the chip
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- "microchip,mcp23s08" for 8 GPIO SPI version
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- "microchip,mcp23s17" for 16 GPIO SPI version
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- "microchip,mcp23s18" for 16 GPIO SPI version
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- "microchip,mcp23008" for 8 GPIO I2C version or
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- "microchip,mcp23017" for 16 GPIO I2C version of the chip
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- "microchip,mcp23018" for 16 GPIO I2C version
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NOTE: Do not use the old mcp prefix any more. It is deprecated and will be
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removed.
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- #gpio-cells : Should be two.
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- first cell is the pin number
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- second cell is used to specify flags as described in
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'Documentation/devicetree/bindings/gpio/gpio.txt'. Allowed values defined by
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'include/dt-bindings/gpio/gpio.h' (e.g. GPIO_ACTIVE_LOW).
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- gpio-controller : Marks the device node as a GPIO controller.
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- reg : For an address on its bus. I2C uses this a the I2C address of the chip.
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SPI uses this to specify the chipselect line which the chip is
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connected to. The driver and the SPI variant of the chip support
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multiple chips on the same chipselect. Have a look at
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microchip,spi-present-mask below.
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Required device specific properties (only for SPI chips):
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- mcp,spi-present-mask (DEPRECATED)
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- microchip,spi-present-mask : This is a present flag, that makes only sense for SPI
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chips - as the name suggests. Multiple SPI chips can share the same
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SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a
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chip connected with the corresponding spi address set. For example if
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you have a chip with address 3 connected, you have to set bit3 to 1,
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which is 0x08. mcp23s08 chip variant only supports bits 0-3. It is not
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possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at
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least one bit to 1 for SPI chips.
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NOTE: Do not use the old mcp prefix any more. It is deprecated and will be
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removed.
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- spi-max-frequency = The maximum frequency this chip is able to handle
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Optional properties:
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- #interrupt-cells : Should be two.
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- first cell is the pin number
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- second cell is used to specify flags.
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- interrupt-controller: Marks the device node as a interrupt controller.
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- drive-open-drain: Sets the ODR flag in the IOCON register. This configures
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the IRQ output as open drain active low.
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- reset-gpios: Corresponds to the active-low RESET# pin for the chip
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Optional device specific properties:
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- microchip,irq-mirror: Sets the mirror flag in the IOCON register. Devices
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with two interrupt outputs (these are the devices ending with 17 and
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those that have 16 IOs) have two IO banks: IO 0-7 form bank 1 and
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IO 8-15 are bank 2. These chips have two different interrupt outputs:
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One for bank 1 and another for bank 2. If irq-mirror is set, both
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interrupts are generated regardless of the bank that an input change
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occurred on. If it is not set, the interrupt are only generated for the
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bank they belong to.
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On devices with only one interrupt output this property is useless.
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- microchip,irq-active-high: Sets the INTPOL flag in the IOCON register. This
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configures the IRQ output polarity as active high.
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Example I2C (with interrupt):
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gpiom1: gpio@20 {
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compatible = "microchip,mcp23017";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x20>;
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interrupt-parent = <&gpio1>;
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interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells=<2>;
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microchip,irq-mirror;
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};
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Example SPI:
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gpiom1: gpio@0 {
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compatible = "microchip,mcp23s17";
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gpio-controller;
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#gpio-cells = <2>;
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microchip,spi-present-mask = <0x01>;
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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Pull-up configuration
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=====================
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If pins are used as output, they can also be configured with pull-ups. This is
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done with pinctrl.
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Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
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for details of the common pinctrl bindings used by client devices,
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including the meaning of the phrase "pin configuration node".
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Optional Pinmux properties:
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--------------------------
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Following properties are required if default setting of pins are required
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at boot.
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- pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
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- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
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<pinctrl-bindings.txt>.
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The pin configurations are defined as child of the pinctrl states node. Each
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sub-node have following properties:
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Required properties:
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------------------
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- pins: List of pins. Valid values of pins properties are:
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gpio0 ... gpio7 for the devices with 8 GPIO pins and
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gpio0 ... gpio15 for the devices with 16 GPIO pins.
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Optional properties:
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-------------------
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The following optional property is defined in the pinmux DT binding document
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<pinctrl-bindings.txt>. Absence of this property will leave the configuration
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in its default state.
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bias-pull-up
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Example with pinctrl to pull-up output pins:
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gpio21: gpio@21 {
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compatible = "microchip,mcp23017";
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gpio-controller;
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#gpio-cells = <0x2>;
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reg = <0x21>;
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interrupt-parent = <&socgpio>;
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interrupts = <0x17 0x8>;
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interrupt-names = "mcp23017@21 irq";
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interrupt-controller;
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#interrupt-cells = <0x2>;
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microchip,irq-mirror;
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pinctrl-names = "default";
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pinctrl-0 = <&i2cgpio0irq>, <&gpio21pullups>;
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reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
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gpio21pullups: pinmux {
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pins = "gpio0", "gpio1", "gpio2", "gpio3",
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"gpio4", "gpio5", "gpio6", "gpio7",
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"gpio8", "gpio9", "gpio10", "gpio11",
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"gpio12", "gpio13", "gpio14", "gpio15";
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bias-pull-up;
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};
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};
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Reference in New Issue
Block a user