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arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances

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The clock IDs for multiple MCSPI instances across wakeup as
well as main domain in J7200 are incorrect when compared with
documentation [1]. This results in kernel crashes when the said
instances are enabled. Fix the clock ids to their appropriate
values.

[1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html

Fixes: 8f6c475f4c ("arm64: dts: ti: k3-j7200: Add MCSPI nodes")

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
Link: https://lore.kernel.org/r/20241023104532.3438851-2-a-dutta@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Anurag Dutta 2024-10-23 16:15:29 +05:30 committed by Vignesh Raghavendra
parent b7af8b4acb
commit 3a47e38167
2 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
View File

@ -1164,7 +1164,7 @@ main_spi0: spi@2100000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 266 1>;
clocks = <&k3_clks 266 4>;
status = "disabled";
};
@ -1175,7 +1175,7 @@ main_spi1: spi@2110000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 267 1>;
clocks = <&k3_clks 267 4>;
status = "disabled";
};
@ -1186,7 +1186,7 @@ main_spi2: spi@2120000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 268 1>;
clocks = <&k3_clks 268 4>;
status = "disabled";
};
@ -1197,7 +1197,7 @@ main_spi3: spi@2130000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 269 1>;
clocks = <&k3_clks 269 4>;
status = "disabled";
};
@ -1208,7 +1208,7 @@ main_spi4: spi@2140000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 270 1>;
clocks = <&k3_clks 270 2>;
status = "disabled";
};
@ -1219,7 +1219,7 @@ main_spi5: spi@2150000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 271 1>;
clocks = <&k3_clks 271 4>;
status = "disabled";
};
@ -1230,7 +1230,7 @@ main_spi6: spi@2160000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 272 1>;
clocks = <&k3_clks 272 4>;
status = "disabled";
};
@ -1241,7 +1241,7 @@ main_spi7: spi@2170000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 273 1>;
clocks = <&k3_clks 273 4>;
status = "disabled";
};

6
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
View File

@ -503,7 +503,7 @@ mcu_spi0: spi@40300000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 274 0>;
clocks = <&k3_clks 274 4>;
status = "disabled";
};
@ -514,7 +514,7 @@ mcu_spi1: spi@40310000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 275 0>;
clocks = <&k3_clks 275 4>;
status = "disabled";
};
@ -525,7 +525,7 @@ mcu_spi2: spi@40320000 {
#address-cells = <1>;
#size-cells = <0>;
power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 276 0>;
clocks = <&k3_clks 276 2>;
status = "disabled";
};