serial: sh-sci: Update rx_trigger size for RZ/T2H RSCI

The RZ/T2H RSCI has 16-stage FIFO. Like other SoCs, set the default
rx_trigger as the fifosize.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/20251129164325.209213-3-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Biju Das 2025-11-29 16:42:58 +00:00 committed by Greg Kroah-Hartman
parent 0774c43c00
commit 3a3ab10245

View File

@ -3330,7 +3330,7 @@ static int sci_init_single(struct platform_device *dev,
sci_port->rx_trigger = 8;
break;
case SCI_PORT_RSCI:
sci_port->rx_trigger = 15;
sci_port->rx_trigger = 16;
break;
default:
sci_port->rx_trigger = 1;