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arm64: tegra: Add DMA properties for Tegra186 and Tegra194 UARTs

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Adding the missing dmas and dma-names properties which are required
for uart when using with the Tegra HSUART driver.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Link: https://lore.kernel.org/r/20250428-tegra-serial-fixes-v1-2-4f47c5d85bf6@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Aaron Kling 2025-04-28 20:51:48 -05:00 committed by Thierry Reding
parent 4cd763297c
commit 39e1cbf57e
6 changed files with 38 additions and 0 deletions
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2
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
View File

@ -61,6 +61,8 @@ memory-controller@2c00000 {
};
serial@3100000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};

2
arch/arm64/boot/dts/nvidia/tegra186-p3509-0000+p3636-0001.dts
View File

@ -549,6 +549,8 @@ timer@3010000 {
};
serial@3100000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};

14
arch/arm64/boot/dts/nvidia/tegra186.dtsi
View File

@ -612,6 +612,8 @@ uarta: serial@3100000 {
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTA>;
resets = <&bpmp TEGRA186_RESET_UARTA>;
dmas = <&gpcdma 8>, <&gpcdma 8>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -622,6 +624,8 @@ uartb: serial@3110000 {
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTB>;
resets = <&bpmp TEGRA186_RESET_UARTB>;
dmas = <&gpcdma 9>, <&gpcdma 9>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -632,6 +636,8 @@ uartd: serial@3130000 {
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTD>;
resets = <&bpmp TEGRA186_RESET_UARTD>;
dmas = <&gpcdma 19>, <&gpcdma 19>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -642,6 +648,8 @@ uarte: serial@3140000 {
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTE>;
resets = <&bpmp TEGRA186_RESET_UARTE>;
dmas = <&gpcdma 20>, <&gpcdma 20>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -652,6 +660,8 @@ uartf: serial@3150000 {
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTF>;
resets = <&bpmp TEGRA186_RESET_UARTF>;
dmas = <&gpcdma 12>, <&gpcdma 12>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -1229,6 +1239,8 @@ uartc: serial@c280000 {
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTC>;
resets = <&bpmp TEGRA186_RESET_UARTC>;
dmas = <&gpcdma 3>, <&gpcdma 3>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -1239,6 +1251,8 @@ uartg: serial@c290000 {
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA186_CLK_UARTG>;
resets = <&bpmp TEGRA186_RESET_UARTG>;
dmas = <&gpcdma 2>, <&gpcdma 2>;
dma-names = "rx", "tx";
status = "disabled";
};

2
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
View File

@ -104,6 +104,8 @@ input@2 {
};
serial@3110000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};

2
arch/arm64/boot/dts/nvidia/tegra194-p3668.dtsi
View File

@ -78,6 +78,8 @@ input@2 {
};
serial@3100000 {
/delete-property/ dmas;
/delete-property/ dma-names;
status = "okay";
};

16
arch/arm64/boot/dts/nvidia/tegra194.dtsi
View File

@ -747,6 +747,8 @@ uarta: serial@3100000 {
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTA>;
resets = <&bpmp TEGRA194_RESET_UARTA>;
dmas = <&gpcdma 8>, <&gpcdma 8>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -757,6 +759,8 @@ uartb: serial@3110000 {
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTB>;
resets = <&bpmp TEGRA194_RESET_UARTB>;
dmas = <&gpcdma 9>, <&gpcdma 9>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -767,6 +771,8 @@ uartd: serial@3130000 {
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTD>;
resets = <&bpmp TEGRA194_RESET_UARTD>;
dmas = <&gpcdma 19>, <&gpcdma 19>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -777,6 +783,8 @@ uarte: serial@3140000 {
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTE>;
resets = <&bpmp TEGRA194_RESET_UARTE>;
dmas = <&gpcdma 20>, <&gpcdma 20>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -787,6 +795,8 @@ uartf: serial@3150000 {
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTF>;
resets = <&bpmp TEGRA194_RESET_UARTF>;
dmas = <&gpcdma 12>, <&gpcdma 12>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -812,6 +822,8 @@ uarth: serial@3170000 {
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTH>;
resets = <&bpmp TEGRA194_RESET_UARTH>;
dmas = <&gpcdma 13>, <&gpcdma 13>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -1609,6 +1621,8 @@ uartc: serial@c280000 {
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTC>;
resets = <&bpmp TEGRA194_RESET_UARTC>;
dmas = <&gpcdma 3>, <&gpcdma 3>;
dma-names = "rx", "tx";
status = "disabled";
};
@ -1619,6 +1633,8 @@ uartg: serial@c290000 {
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_UARTG>;
resets = <&bpmp TEGRA194_RESET_UARTG>;
dmas = <&gpcdma 2>, <&gpcdma 2>;
dma-names = "rx", "tx";
status = "disabled";
};