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spi: sh-msiof: Simplify BRG's Division Ratio

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As FIELD_PREP() masks the value to be stored in the field, the Baud Rate
Generator's Division Ratio handling can be simplified from a look-up
table to a single subtraction.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/e736221942b0381fb53dc64109a1389f7ec5f44a.1747401908.git.geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Geert Uytterhoeven 2025-05-16 15:32:21 +02:00 committed by Mark Brown
parent 5b91dc7e3e
commit 39d0856f41
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GPG Key ID: 24D68B725D5487D0
1 changed files with 2 additions and 12 deletions
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14
drivers/spi/spi-sh-msiof.c
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@ -112,12 +112,6 @@ struct sh_msiof_spi_priv {
/* SITSCR and SIRSCR */
#define SISCR_BRPS GENMASK(12, 8) /* Prescaler Setting (1-32) */
#define SISCR_BRDV GENMASK(2, 0) /* Baud Rate Generator's Division Ratio */
#define SISCR_BRDV_DIV_2 0U
#define SISCR_BRDV_DIV_4 1U
#define SISCR_BRDV_DIV_8 2U
#define SISCR_BRDV_DIV_16 3U
#define SISCR_BRDV_DIV_32 4U
#define SISCR_BRDV_DIV_1 7U
/* SICTR */
#define SICTR_TSCKIZ GENMASK(31, 30) /* Transmit Clock I/O Polarity Select */
@ -256,11 +250,6 @@ static void sh_msiof_spi_reset_regs(struct sh_msiof_spi_priv *p)
100);
}
static const u32 sh_msiof_spi_div_array[] = {
SISCR_BRDV_DIV_1, SISCR_BRDV_DIV_2, SISCR_BRDV_DIV_4,
SISCR_BRDV_DIV_8, SISCR_BRDV_DIV_16, SISCR_BRDV_DIV_32,
};
static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p,
struct spi_transfer *t)
{
@ -299,7 +288,8 @@ static void sh_msiof_spi_set_clk_regs(struct sh_msiof_spi_priv *p,
t->effective_speed_hz = parent_rate / (brps << div_pow);
scr = FIELD_PREP(SISCR_BRDV, sh_msiof_spi_div_array[div_pow]) |
/* div_pow == 0 maps to SISCR_BRDV_DIV_1 == all ones */
scr = FIELD_PREP(SISCR_BRDV, div_pow - 1) |
FIELD_PREP(SISCR_BRPS, brps - 1);
sh_msiof_write(p, SITSCR, scr);
if (!(p->ctlr->flags & SPI_CONTROLLER_MUST_TX))