arm64: dts: imx93-11x11-evk: change usdhc tuning step for eMMC and SD

During system resume, the following errors occurred:

  [  430.638625] mmc1: error -84 writing Cache Enable bit
  [  430.643618] mmc1: error -84 doing runtime resume

For eMMC and SD, there are two tuning pass windows and the gap between
those two windows may only have one cell. If tuning step > 1, the gap may
just be skipped and host assumes those two windows as a continuous
windows. This will cause a wrong delay cell near the gap to be selected.

Set the tuning step to 1 to avoid selecting the wrong delay cell.

For SDIO, the gap is sufficiently large, so the default tuning step does
not cause this issue.

Fixes: e37907bd82 ("arm64: dts: freescale: add i.MX93 11x11 EVK basic support")
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
This commit is contained in:
Luke Wang 2026-02-03 19:23:09 +08:00 committed by Frank Li
parent 5ab0c76df2
commit 399c6e3385

View File

@ -535,6 +535,7 @@ &usdhc1 {
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <8>;
non-removable;
fsl,tuning-step = <1>;
status = "okay";
};
@ -547,6 +548,7 @@ &usdhc2 {
cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_usdhc2_vmmc>;
bus-width = <4>;
fsl,tuning-step = <1>;
status = "okay";
no-mmc;
};