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drm/amd/display: Promote DC to 3.2.375

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This version brings along following fixes:

- Rework YCbCr422 DSC policy
- Restore full update for tiling change to linear
- add dccg FGCG mask init
- Remove unnecessary completion flag for secure display
- Agument live + capture with CVT case.
- remove dc_clock_limit for apu
- Fix Signed/Unsigned Int Usage Compiler Warning
- Hardcode dtbclk value in bw_params
- Revert inbox0 lock for cursor due to deadlock
- Add 3DLUT DMA broadcast support
- Fix Silence warnings
- export get_power_profile interface for later use
- pg cntl update based on previous asic.
- remove disable_sutter touch pstate debug code
- Refactor DC update checks
- Fix drm_edid leak in amdgpu_dm
- Add Extra SMU Log for dtbclk
- Clamp min DS DCFCLK value to DCN limit
- Update dpia supported configuration
- Multiple DCN42 updates

Acked-by: ChiaHsuan Chung <ChiaHsuan.Chung@amd.com>
Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Chuanyu Tseng <chuanyu.tseng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Taimur Hassan 2026-03-13 17:42:59 -05:00 committed by Alex Deucher
parent 19b79e4f21
commit 38f471d38b
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/display/dc/dc.h
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@ -63,7 +63,7 @@ struct dcn_dsc_reg_state;
struct dcn_optc_reg_state;
struct dcn_dccg_reg_state;
#define DC_VER "3.2.374"
#define DC_VER "3.2.375"
/**
* MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC