diff --git a/drivers/clk/rockchip/clk-px30.c b/drivers/clk/rockchip/clk-px30.c
index eeaf5b424788..2f645f3a7f26 100644
--- a/drivers/clk/rockchip/clk-px30.c
+++ b/drivers/clk/rockchip/clk-px30.c
@@ -424,6 +424,10 @@ static struct rockchip_clk_branch px30_clk_branches[] __initdata = {
 	COMPOSITE(SCLK_CIF_OUT, "clk_cif_out", mux_cif_out_p, 0,
 			PX30_CLKSEL_CON(13), 6, 2, MFLAGS, 0, 6, DFLAGS,
 			PX30_CLKGATE_CON(4), 11, GFLAGS),
+	GATE(PCLK_ISP, "pclkin_isp", "ext_pclkin", 0,
+			PX30_CLKGATE_CON(4), 13, GFLAGS),
+	GATE(PCLK_CIF, "pclkin_cif", "ext_pclkin", 0,
+			PX30_CLKGATE_CON(4), 14, GFLAGS),
 
 	/*
 	 * Clock-Architecture Diagram 6
diff --git a/include/dt-bindings/clock/px30-cru.h b/include/dt-bindings/clock/px30-cru.h
index 604158efa3ce..80f1be61ff0d 100644
--- a/include/dt-bindings/clock/px30-cru.h
+++ b/include/dt-bindings/clock/px30-cru.h
@@ -178,8 +178,10 @@
 #define PCLK_GPIO1		348
 #define PCLK_GPIO2		349
 #define PCLK_GPIO3		350
+#define PCLK_ISP		351
+#define PCLK_CIF		352
 
-#define CLK_NR_CLKS		(PCLK_GPIO3 + 1)
+#define CLK_NR_CLKS		(PCLK_CIF + 1)
 
 /* pmu-clocks indices */