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drm/rockchip: vop2: afbc_tile_num should align up to 16 pixel and divide 16
Change-Id: Ied67749759268e9ff4acb0322a6517f8ed099c9d Signed-off-by: Sandy Huang <hjc@rock-chips.com>
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@ -1991,7 +1991,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, struct drm_plane_s
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if (vpstate->afbc_en) {
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/* the afbc superblock is 16 x 16 */
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afbc_format = vop2_convert_afbc_format(fb->format->format);
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afbc_tile_num = actual_w >> 4;
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afbc_tile_num = ALIGN(actual_w, 16) >> 4;
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/* AFBC pic_vir_width is count by pixel, this is different
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* with WIN_VIR_STRIDE.
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*/
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