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video: rockchip: mpp: fix error for clear cache
1. rkvdec2 use 3 cache. 2. cache offset is 0x500 not 0x700. Change-Id: Ib5715750c363a9a7ffda938466eb32a0ea43b729 Signed-off-by: Ding Wei <leo.ding@rock-chips.com>
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@ -72,10 +72,12 @@
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#define RKVDEC_IRQ_RAW BIT(1)
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#define RKVDEC_IRQ BIT(0)
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#define RKVDEC_REG_CACHE0_SIZE_BASE 0x71c
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#define RKVDEC_REG_CACHE1_SIZE_BASE 0x75c
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#define RKVDEC_REG_CLR_CACHE0_BASE 0x710
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#define RKVDEC_REG_CLR_CACHE1_BASE 0x750
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#define RKVDEC_REG_CACHE0_SIZE_BASE 0x51c
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#define RKVDEC_REG_CACHE1_SIZE_BASE 0x55c
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#define RKVDEC_REG_CACHE2_SIZE_BASE 0x59c
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#define RKVDEC_REG_CLR_CACHE0_BASE 0x510
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#define RKVDEC_REG_CLR_CACHE1_BASE 0x550
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#define RKVDEC_REG_CLR_CACHE2_BASE 0x590
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#define RKVDEC_CACHE_PERMIT_CACHEABLE_ACCESS BIT(0)
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#define RKVDEC_CACHE_PERMIT_READ_ALLOCATE BIT(1)
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@ -311,9 +313,11 @@ static int rkvdec_run(struct mpp_dev *mpp, struct mpp_task *mpp_task)
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mpp_write_relaxed(mpp, RKVDEC_REG_CACHE0_SIZE_BASE, reg);
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mpp_write_relaxed(mpp, RKVDEC_REG_CACHE1_SIZE_BASE, reg);
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mpp_write_relaxed(mpp, RKVDEC_REG_CACHE2_SIZE_BASE, reg);
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/* clear cache */
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mpp_write_relaxed(mpp, RKVDEC_REG_CLR_CACHE0_BASE, 1);
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mpp_write_relaxed(mpp, RKVDEC_REG_CLR_CACHE1_BASE, 1);
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mpp_write_relaxed(mpp, RKVDEC_REG_CLR_CACHE2_BASE, 1);
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/* set registers for hardware */
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for (i = 0; i < task->w_req_cnt; i++) {
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int s, e;
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