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dt-bindings: riscv: Add Zic64b extension description
Zic64b mandates that cache blocks are 64 bytes in size and naturally aligned in the address space. It is a mandatory extension of both the RVA22 (U64/S64) and RVA23 (U64/S64) profiles, ratified with RISC-V Profiles Version 1.0. Document it so it can be described in the riscv,isa-extensions property, alongside the related Zicbom/Zicbop/Zicboz cache-block extensions. Since Zic64b fixes the cache block size at 64 bytes, also add a schema check requiring any present cbom/cbop/cboz block size to be 64. The check matches only nodes that use riscv,isa-extensions, so nodes carrying just the deprecated riscv,isa string are not affected. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Guodong Xu <guodong.xu@oss.qualcomm.com> Link: https://patch.msgid.link/20260920-rva23u64-hwprobe-v2-v8-3-5f14bc5c23d3@oss.qualcomm.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
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@ -537,6 +537,12 @@ properties:
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in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
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riscv-isa-manual.
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- const: zic64b
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description:
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The standard Zic64b extension for 64-byte naturally aligned cache
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blocks, as ratified in RISC-V Profiles Version 1.0, with commit
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b1d806605f87 ("Updated to ratified state.")
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- const: zicbom
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description:
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The standard Zicbom extension for base cache management operations as
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@ -1211,6 +1217,22 @@ allOf:
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not:
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contains:
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const: zilsd
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# Zic64b mandates 64-byte naturally aligned cache blocks
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- if:
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properties:
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riscv,isa-extensions:
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contains:
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const: zic64b
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required:
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- riscv,isa-extensions
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then:
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properties:
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riscv,cbom-block-size:
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const: 64
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riscv,cbop-block-size:
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const: 64
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riscv,cboz-block-size:
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const: 64
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# All three Zicbo* extensions require their block size property as there's no
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# default.
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- if:
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