arm64: dts: rockchip: add cpu opp-table for RK3568

Change-Id: I287e4cc6658684e6a878fea399c2025bb3b985df
Signed-off-by: Liang Chen <cl@rock-chips.com>
This commit is contained in:
Liang Chen 2020-11-04 10:41:42 +08:00
parent 6a1a1cf4e7
commit 36f9645063

View File

@ -51,6 +51,8 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a55";
reg = <0x0 0x0>;
enable-method = "psci";
clocks = <&cru ARMCLK>;
operating-points-v2 = <&cpu0_opp_table>;
};
cpu1: cpu@100 {
@ -58,6 +60,8 @@ cpu1: cpu@100 {
compatible = "arm,cortex-a55";
reg = <0x0 0x100>;
enable-method = "psci";
clocks = <&cru ARMCLK>;
operating-points-v2 = <&cpu0_opp_table>;
};
cpu2: cpu@200 {
@ -65,6 +69,8 @@ cpu2: cpu@200 {
compatible = "arm,cortex-a55";
reg = <0x0 0x200>;
enable-method = "psci";
clocks = <&cru ARMCLK>;
operating-points-v2 = <&cpu0_opp_table>;
};
cpu3: cpu@300 {
@ -72,6 +78,40 @@ cpu3: cpu@300 {
compatible = "arm,cortex-a55";
reg = <0x0 0x300>;
enable-method = "psci";
clocks = <&cru ARMCLK>;
operating-points-v2 = <&cpu0_opp_table>;
};
};
cpu0_opp_table: cpu0-opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <1000000 1000000 1250000>;
clock-latency-ns = <40000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1000000 1000000 1250000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1000000 1000000 1250000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1000000 1000000 1250000>;
clock-latency-ns = <40000>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1000000 1000000 1250000>;
clock-latency-ns = <40000>;
};
};