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drm/amd/pm: Add generic pcie dpm table

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Add a generic pcie dpm table which contains the number of link clock
levels and link clock, pcie gen speed/width corresponding to each level.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Lijo Lazar 2025-11-25 16:36:08 +05:30 committed by Alex Deucher
parent b4742a9e7f
commit 36b98a7229
1 changed files with 9 additions and 0 deletions
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9
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
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@ -314,6 +314,15 @@ struct smu_dpm_table {
#define SMU_DPM_TABLE_MAX(table) \
((table)->count > 0 ? (table)->dpm_levels[(table)->count - 1].value : 0)
#define SMU_MAX_PCIE_LEVELS 3
struct smu_pcie_table {
uint8_t pcie_gen[SMU_MAX_PCIE_LEVELS];
uint8_t pcie_lane[SMU_MAX_PCIE_LEVELS];
uint16_t lclk_freq[SMU_MAX_PCIE_LEVELS];
uint32_t lclk_levels;
};
struct smu_bios_boot_up_values {
uint32_t revision;
uint32_t gfxclk;