From 36b1d3299d0b6aa51485cc9a79b8d94948d5f3d4 Mon Sep 17 00:00:00 2001 From: Michael Guralnik Date: Sun, 26 Jul 2026 12:09:40 +0300 Subject: [PATCH] net/mlx5: Add qp_latency_sensitive_disable cap bit Introduce the qp_latency_sensitive_disable capability bit to indicate that the device no longer implements a separate class for latency-sensitive QPs, so drivers can stop programming the latency_sensitive QPC field and skip allocating the dedicated fast-path bfreg on such HW. Signed-off-by: Michael Guralnik Reviewed-by: Patrisious Haddad Signed-off-by: Edward Srouji Link: https://patch.msgid.link/20260726-deprecate-lat-qps-v2-1-5e0c2ee55046@nvidia.com Signed-off-by: Leon Romanovsky --- include/linux/mlx5/mlx5_ifc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index c7206a9d6731..a712463e89b4 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -2005,7 +2005,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 log_max_stride_sz_rq[0x5]; u8 reserved_at_3a8[0x3]; u8 log_min_stride_sz_rq[0x5]; - u8 reserved_at_3b0[0x3]; + u8 reserved_at_3b0[0x2]; + u8 qp_latency_sensitive_disable[0x1]; u8 log_max_stride_sz_sq[0x5]; u8 reserved_at_3b8[0x3]; u8 log_min_stride_sz_sq[0x5];