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clk: renesas: rzv2h: Add instance field to struct pll

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Add a two-bit "instance" member to struct pll and extend the PLL_PACK()
macro to accept an instance parameter.  Initialize all existing PLL
definitions with instance 0 to preserve legacy behavior. This change
enables support for SoCs with multiple PLL instances (for example,
RZ/G3E we have two PLL DSIs).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251015192611.241920-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2025-10-15 20:26:05 +01:00 committed by Geert Uytterhoeven
parent 3a86608788
commit 36a23904b4
1 changed files with 7 additions and 4 deletions
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11
drivers/clk/renesas/rzv2h-cpg.h
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@ -16,20 +16,23 @@
*
* @offset: STBY register offset
* @has_clkn: Flag to indicate if CLK1/2 are accessible or not
* @instance: PLL instance number
*/
struct pll {
unsigned int offset:9;
unsigned int has_clkn:1;
unsigned int instance:2;
};
#define PLL_PACK(_offset, _has_clkn) \
#define PLL_PACK(_offset, _has_clkn, _instance) \
((struct pll){ \
.offset = _offset, \
.has_clkn = _has_clkn \
.has_clkn = _has_clkn, \
.instance = _instance \
})
#define PLLCA55 PLL_PACK(0x60, 1)
#define PLLGPU PLL_PACK(0x120, 1)
#define PLLCA55 PLL_PACK(0x60, 1, 0)
#define PLLGPU PLL_PACK(0x120, 1, 0)
/**
* struct ddiv - Structure for dynamic switching divider