From 35934fd08d17071c5ae0e99b95258f61f0cff763 Mon Sep 17 00:00:00 2001 From: Ashish Mhetre Date: Thu, 30 Apr 2026 09:52:02 +0000 Subject: [PATCH] memory: tegra: Restore MC interrupt masks on resume The MC interrupt mask registers lose their state across Tegra low power suspend state (aka. SC7). Without re-applying them on resume, MC interrupts that were enabled at probe remain masked after wake, so any post-resume MC error goes unreported. Factor the existing intmask programming out of tegra_mc_probe() into tegra_mc_setup_intmask() and reuse it from the system resume callback so the mask state is restored on wake. Signed-off-by: Ashish Mhetre Reviewed-by: Jon Hunter Link: https://patch.msgid.link/20260430095202.1167651-4-amhetre@nvidia.com Signed-off-by: Krzysztof Kozlowski --- drivers/memory/tegra/mc.c | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 64e41338cdf2..cfcfc7291106 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -911,6 +911,19 @@ static void tegra_mc_num_channel_enabled(struct tegra_mc *mc) } } +static void tegra_mc_setup_intmask(struct tegra_mc *mc) +{ + unsigned int i; + + for (i = 0; i < mc->soc->num_intmasks; i++) { + if (mc->soc->num_channels) + mc_ch_writel(mc, MC_BROADCAST_CHANNEL, mc->soc->intmasks[i].mask, + mc->soc->intmasks[i].reg); + else + mc_writel(mc, mc->soc->intmasks[i].mask, mc->soc->intmasks[i].reg); + } +} + static int tegra_mc_probe(struct platform_device *pdev) { struct tegra_mc *mc; @@ -971,13 +984,7 @@ static int tegra_mc_probe(struct platform_device *pdev) } } - for (i = 0; i < mc->soc->num_intmasks; i++) { - if (mc->soc->num_channels) - mc_ch_writel(mc, MC_BROADCAST_CHANNEL, mc->soc->intmasks[i].mask, - mc->soc->intmasks[i].reg); - else - mc_writel(mc, mc->soc->intmasks[i].mask, mc->soc->intmasks[i].reg); - } + tegra_mc_setup_intmask(mc); } if (mc->soc->reset_ops) { @@ -1018,6 +1025,8 @@ static int tegra_mc_resume(struct device *dev) if (mc->soc->ops && mc->soc->ops->resume) mc->soc->ops->resume(mc); + tegra_mc_setup_intmask(mc); + return 0; }