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drm/amd/display: Modify Vmin default value
Fine tune the Vmin clock value Reviewed-by: Robin Chen <robin.chen@amd.com> Acked-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Max Tseng <max.tseng@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1914,7 +1914,7 @@ static bool dcn314_resource_construct(
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dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
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dc->caps.color.mpc.ocsc = 1;
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dc->caps.max_disp_clock_khz_at_vmin = 694000;
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dc->caps.max_disp_clock_khz_at_vmin = 650000;
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/* Use pipe context based otg sync logic */
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dc->config.use_pipe_ctx_sync_logic = true;
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@ -1830,7 +1830,13 @@ static bool dcn35_resource_construct(
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dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
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dc->caps.color.mpc.ocsc = 1;
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dc->caps.max_disp_clock_khz_at_vmin = 669154;
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/* max_disp_clock_khz_at_vmin is slightly lower than the STA value in order
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* to provide some margin.
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* It's expected for furture ASIC to have equal or higher value, in order to
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* have determinstic power improvement from generate to genration.
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* (i.e., we should not expect new ASIC generation with lower vmin rate)
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*/
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dc->caps.max_disp_clock_khz_at_vmin = 650000;
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/* Use pipe context based otg sync logic */
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dc->config.use_pipe_ctx_sync_logic = true;
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