mirror of
https://github.com/torvalds/linux.git
synced 2026-07-28 01:55:51 +02:00
drm/amd/display: dmub_cmd.h: correct typos and spellos
Fix spelling issues that are reported by codespell: dmub_cmd.h:332: alighment ==> alignment dmub_cmd.h:2029: sequeunce ==> sequence dmub_cmd.h:3684: optimzations ==> optimizations dmub_cmd.h:4491: isntance ==> instance dmub_cmd.h:4514: optimzations ==> optimizations dmub_cmd.h:4604: isntance ==> instance dmub_cmd.h:4643: isntance ==> instance dmub_cmd.h:4679: isntance ==> instance dmub_cmd.h:4699: isntance ==> instance dmub_cmd.h:4719: isntance ==> instance dmub_cmd.h:4735: isntance ==> instance dmub_cmd.h:4749: isntance ==> instance dmub_cmd.h:4795: isntance ==> instance dmub_cmd.h:4903: isntance ==> instance dmub_cmd.h:4936: isntance ==> instance dmub_cmd.h:5066: re-use ==> reuse dmub_cmd.h:6552: isntance ==> instance dmub_cmd.h:6630: isntance ==> instance dmub_cmd.h:6639: optimzations ==> optimizations dmub_cmd.h:6720: isntance ==> instance dmub_cmd.h:6742: isntance ==> instance and fix a few that I found: dicated ==> dictated (7x) afftet ==> after (is this correct?) Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
399b9abc35
commit
35540938bf
|
|
@ -329,7 +329,7 @@ union dmub_addr {
|
|||
|
||||
/* Flattened structure containing SOC BB parameters stored in the VBIOS
|
||||
* It is not practical to store the entire bounding box in VBIOS since the bounding box struct can gain new parameters.
|
||||
* This also prevents alighment issues when new parameters are added to the SoC BB.
|
||||
* This also prevents alignment issues when new parameters are added to the SoC BB.
|
||||
* The following parameters should be added since these values can't be obtained elsewhere:
|
||||
* -dml2_soc_power_management_parameters
|
||||
* -dml2_soc_vmin_clock_limits
|
||||
|
|
@ -2007,7 +2007,7 @@ struct dmub_rb_cmd_read_modify_write {
|
|||
};
|
||||
|
||||
/*
|
||||
* Update a register with specified masks and values sequeunce
|
||||
* Update a register with specified masks and values sequence
|
||||
*
|
||||
* 60 payload bytes can hold address + up to 7 sets of mask/value combo, each take 2 dword
|
||||
*
|
||||
|
|
@ -3489,7 +3489,7 @@ enum dmub_cmd_psr_type {
|
|||
|
||||
/**
|
||||
* Set PSR level.
|
||||
* PSR level is a 16-bit value dicated by driver that
|
||||
* PSR level is a 16-bit value dictated by driver that
|
||||
* will enable/disable different functionality.
|
||||
*/
|
||||
DMUB_CMD__PSR_SET_LEVEL = 4,
|
||||
|
|
@ -3646,7 +3646,7 @@ struct dmub_cmd_psr_copy_settings_data {
|
|||
*/
|
||||
union dmub_psr_debug_flags debug;
|
||||
/**
|
||||
* 16-bit value dicated by driver that will enable/disable different functionality.
|
||||
* 16-bit value dictated by driver that will enable/disable different functionality.
|
||||
*/
|
||||
uint16_t psr_level;
|
||||
/**
|
||||
|
|
@ -3686,7 +3686,7 @@ struct dmub_cmd_psr_copy_settings_data {
|
|||
*/
|
||||
uint8_t aux_inst;
|
||||
/**
|
||||
* Determines if SMU optimzations are enabled/disabled.
|
||||
* Determines if SMU optimizations are enabled/disabled.
|
||||
*/
|
||||
uint8_t smu_optimizations_en;
|
||||
/**
|
||||
|
|
@ -3803,7 +3803,7 @@ struct dmub_rb_cmd_psr_copy_settings {
|
|||
*/
|
||||
struct dmub_cmd_psr_set_level_data {
|
||||
/**
|
||||
* 16-bit value dicated by driver that will enable/disable different functionality.
|
||||
* 16-bit value dictated by driver that will enable/disable different functionality.
|
||||
*/
|
||||
uint16_t psr_level;
|
||||
/**
|
||||
|
|
@ -4181,7 +4181,7 @@ struct dmub_rb_cmd_update_cursor_info {
|
|||
*/
|
||||
struct dmub_cmd_psr_set_vtotal_data {
|
||||
/**
|
||||
* 16-bit value dicated by driver that indicates the vtotal in PSR active requirement when screen idle..
|
||||
* 16-bit value dictated by driver that indicates the vtotal in PSR active requirement when screen idle..
|
||||
*/
|
||||
uint16_t psr_vtotal_idle;
|
||||
/**
|
||||
|
|
@ -4195,7 +4195,7 @@ struct dmub_cmd_psr_set_vtotal_data {
|
|||
*/
|
||||
uint8_t panel_inst;
|
||||
/*
|
||||
* 16-bit value dicated by driver that indicates the vtotal in PSR active requirement when doing SU/FFU.
|
||||
* 16-bit value dictated by driver that indicates the vtotal in PSR active requirement when doing SU/FFU.
|
||||
*/
|
||||
uint16_t psr_vtotal_su;
|
||||
/**
|
||||
|
|
@ -4495,7 +4495,7 @@ struct dmub_cmd_replay_copy_settings_data {
|
|||
uint8_t aux_inst;
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which psr_state to use
|
||||
* Panel instance to identify which psr_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4518,7 +4518,7 @@ struct dmub_cmd_replay_copy_settings_data {
|
|||
*/
|
||||
uint8_t dpphy_inst;
|
||||
/**
|
||||
* Determines if SMU optimzations are enabled/disabled.
|
||||
* Determines if SMU optimizations are enabled/disabled.
|
||||
*/
|
||||
uint8_t smu_optimizations_en;
|
||||
/**
|
||||
|
|
@ -4608,7 +4608,7 @@ struct dmub_rb_cmd_smart_power_oled_enable_data {
|
|||
uint8_t enable;
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4647,7 +4647,7 @@ struct dmub_rb_cmd_replay_enable_data {
|
|||
uint8_t enable;
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4695,7 +4695,7 @@ struct dmub_rb_cmd_replay_enable {
|
|||
struct dmub_cmd_replay_set_power_opt_data {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4715,7 +4715,7 @@ struct dmub_cmd_replay_set_power_opt_data {
|
|||
struct dmub_cmd_replay_set_timing_sync_data {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4735,7 +4735,7 @@ struct dmub_cmd_replay_set_timing_sync_data {
|
|||
struct dmub_cmd_replay_set_pseudo_vtotal {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4751,7 +4751,7 @@ struct dmub_cmd_replay_set_pseudo_vtotal {
|
|||
struct dmub_cmd_replay_disabled_adaptive_sync_sdp_data {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4765,7 +4765,7 @@ struct dmub_cmd_replay_disabled_adaptive_sync_sdp_data {
|
|||
struct dmub_cmd_replay_set_general_cmd_data {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4802,7 +4802,7 @@ struct dmub_rb_cmd_replay_set_power_opt {
|
|||
*/
|
||||
struct dmub_cmd_replay_set_coasting_vtotal_data {
|
||||
/**
|
||||
* 16-bit value dicated by driver that indicates the coasting vtotal.
|
||||
* 16-bit value dictated by driver that indicates the coasting vtotal.
|
||||
*/
|
||||
uint16_t coasting_vtotal;
|
||||
/**
|
||||
|
|
@ -4811,12 +4811,12 @@ struct dmub_cmd_replay_set_coasting_vtotal_data {
|
|||
uint8_t cmd_version;
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
/**
|
||||
* 16-bit value dicated by driver that indicates the coasting vtotal high byte part.
|
||||
* 16-bit value dictated by driver that indicates the coasting vtotal high byte part.
|
||||
*/
|
||||
uint16_t coasting_vtotal_high;
|
||||
/**
|
||||
|
|
@ -4919,7 +4919,7 @@ struct dmub_rb_cmd_replay_set_general_cmd {
|
|||
struct dmub_cmd_replay_frameupdate_timer_data {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -4952,7 +4952,7 @@ struct dmub_rb_cmd_replay_set_frameupdate_timer {
|
|||
union dmub_replay_cmd_set {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -5128,7 +5128,7 @@ struct dmub_hw_lock_inst_flags {
|
|||
uint8_t opp_inst;
|
||||
/**
|
||||
* OTG HW instance for global update lock.
|
||||
* TODO: Remove, and re-use otg_inst.
|
||||
* TODO: Remove, and reuse otg_inst.
|
||||
*/
|
||||
uint8_t dig_inst;
|
||||
/**
|
||||
|
|
@ -6615,7 +6615,7 @@ struct dmub_cmd_pr_enable_data {
|
|||
uint8_t enable;
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which replay_state to use
|
||||
* Panel instance to identify which replay_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -6693,7 +6693,7 @@ struct dmub_cmd_pr_copy_settings_data {
|
|||
uint8_t aux_inst;
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which psr_state to use
|
||||
* Panel instance to identify which psr_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -6702,7 +6702,7 @@ struct dmub_cmd_pr_copy_settings_data {
|
|||
*/
|
||||
uint8_t dpphy_inst;
|
||||
/**
|
||||
* Determines if SMU optimzations are enabled/disabled.
|
||||
* Determines if SMU optimizations are enabled/disabled.
|
||||
*/
|
||||
uint8_t smu_optimizations_en;
|
||||
/**
|
||||
|
|
@ -6710,7 +6710,7 @@ struct dmub_cmd_pr_copy_settings_data {
|
|||
*/
|
||||
uint32_t line_time_in_ns;
|
||||
/*
|
||||
* Use FSFT afftet pixel clk
|
||||
* Use FSFT after pixel clk
|
||||
*/
|
||||
uint32_t pix_clk_100hz;
|
||||
/*
|
||||
|
|
@ -6783,7 +6783,7 @@ union dmub_pr_runtime_flags {
|
|||
struct dmub_cmd_pr_update_state_data {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which psr_state to use
|
||||
* Panel instance to identify which psr_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
@ -6805,7 +6805,7 @@ struct dmub_cmd_pr_update_state_data {
|
|||
struct dmub_cmd_pr_general_cmd_data {
|
||||
/**
|
||||
* Panel Instance.
|
||||
* Panel isntance to identify which psr_state to use
|
||||
* Panel instance to identify which psr_state to use
|
||||
* Currently the support is only for 0 or 1
|
||||
*/
|
||||
uint8_t panel_inst;
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user