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net: txgbe: support CR modules for AML devices
Support to identify 25G/10G CR modules for AML devices. Autoneg is enbaled by default in CR mode. Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com> Link: https://patch.msgid.link/20251118080259.24676-2-jiawenwu@trustnetic.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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@ -104,7 +104,8 @@ static int txgbe_set_phy_link_hostif(struct wx *wx, int speed, int autoneg, int
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WX_HI_COMMAND_TIMEOUT, true);
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}
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static void txgbe_get_link_capabilities(struct wx *wx, int *speed, int *duplex)
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static void txgbe_get_link_capabilities(struct wx *wx, int *speed,
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int *autoneg, int *duplex)
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{
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struct txgbe *txgbe = wx->priv;
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@ -115,6 +116,7 @@ static void txgbe_get_link_capabilities(struct wx *wx, int *speed, int *duplex)
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else
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*speed = SPEED_UNKNOWN;
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*autoneg = phylink_test(txgbe->advertising, Autoneg);
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*duplex = *speed == SPEED_UNKNOWN ? DUPLEX_HALF : DUPLEX_FULL;
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}
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@ -135,11 +137,11 @@ static void txgbe_get_mac_link(struct wx *wx, int *speed)
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int txgbe_set_phy_link(struct wx *wx)
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{
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int speed, duplex, err;
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int speed, autoneg, duplex, err;
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txgbe_get_link_capabilities(wx, &speed, &duplex);
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txgbe_get_link_capabilities(wx, &speed, &autoneg, &duplex);
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err = txgbe_set_phy_link_hostif(wx, speed, 0, duplex);
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err = txgbe_set_phy_link_hostif(wx, speed, autoneg, duplex);
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if (err) {
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wx_err(wx, "Failed to setup link\n");
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return err;
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@ -154,19 +156,43 @@ static int txgbe_sfp_to_linkmodes(struct wx *wx, struct txgbe_sfp_id *id)
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DECLARE_PHY_INTERFACE_MASK(interfaces);
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struct txgbe *txgbe = wx->priv;
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if (id->com_25g_code & (TXGBE_SFF_25GBASESR_CAPABLE |
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TXGBE_SFF_25GBASEER_CAPABLE |
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TXGBE_SFF_25GBASELR_CAPABLE)) {
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phylink_set(modes, 25000baseSR_Full);
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if (id->cable_tech & TXGBE_SFF_DA_PASSIVE_CABLE) {
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txgbe->link_port = PORT_DA;
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phylink_set(modes, Autoneg);
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if (id->com_25g_code == TXGBE_SFF_25GBASECR_91FEC ||
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id->com_25g_code == TXGBE_SFF_25GBASECR_74FEC ||
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id->com_25g_code == TXGBE_SFF_25GBASECR_NOFEC) {
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phylink_set(modes, 25000baseCR_Full);
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phylink_set(modes, 10000baseCR_Full);
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__set_bit(PHY_INTERFACE_MODE_25GBASER, interfaces);
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__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
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} else {
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phylink_set(modes, 10000baseCR_Full);
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__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
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}
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} else if (id->cable_tech & TXGBE_SFF_DA_ACTIVE_CABLE) {
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txgbe->link_port = PORT_DA;
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phylink_set(modes, Autoneg);
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phylink_set(modes, 25000baseCR_Full);
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__set_bit(PHY_INTERFACE_MODE_25GBASER, interfaces);
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}
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if (id->com_10g_code & TXGBE_SFF_10GBASESR_CAPABLE) {
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phylink_set(modes, 10000baseSR_Full);
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__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
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}
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if (id->com_10g_code & TXGBE_SFF_10GBASELR_CAPABLE) {
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phylink_set(modes, 10000baseLR_Full);
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__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
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} else {
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if (id->com_25g_code == TXGBE_SFF_25GBASESR_CAPABLE ||
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id->com_25g_code == TXGBE_SFF_25GBASEER_CAPABLE ||
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id->com_25g_code == TXGBE_SFF_25GBASELR_CAPABLE) {
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txgbe->link_port = PORT_FIBRE;
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phylink_set(modes, 25000baseSR_Full);
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__set_bit(PHY_INTERFACE_MODE_25GBASER, interfaces);
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}
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if (id->com_10g_code & TXGBE_SFF_10GBASESR_CAPABLE) {
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txgbe->link_port = PORT_FIBRE;
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phylink_set(modes, 10000baseSR_Full);
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__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
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}
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if (id->com_10g_code & TXGBE_SFF_10GBASELR_CAPABLE) {
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txgbe->link_port = PORT_FIBRE;
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phylink_set(modes, 10000baseLR_Full);
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__set_bit(PHY_INTERFACE_MODE_10GBASER, interfaces);
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}
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}
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if (phy_interface_empty(interfaces)) {
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@ -177,7 +203,6 @@ static int txgbe_sfp_to_linkmodes(struct wx *wx, struct txgbe_sfp_id *id)
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phylink_set(modes, Pause);
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phylink_set(modes, Asym_Pause);
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phylink_set(modes, FIBRE);
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txgbe->link_port = PORT_FIBRE;
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if (!linkmode_equal(txgbe->sfp_support, modes)) {
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linkmode_copy(txgbe->sfp_support, modes);
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@ -30,7 +30,8 @@ int txgbe_get_link_ksettings(struct net_device *netdev,
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return 0;
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cmd->base.port = txgbe->link_port;
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cmd->base.autoneg = AUTONEG_DISABLE;
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cmd->base.autoneg = phylink_test(txgbe->advertising, Autoneg) ?
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AUTONEG_ENABLE : AUTONEG_DISABLE;
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linkmode_copy(cmd->link_modes.supported, txgbe->sfp_support);
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linkmode_copy(cmd->link_modes.advertising, txgbe->advertising);
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