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i3c: mipi-i3c-hci: Add DMA ring abort quirk for Intel controllers

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DMA rings can be aborted either per-ring via RING_CONTROL or globally
via HC_CONTROL_ABORT. The driver currently relies on the per-ring
mechanism.

Some Intel I3C HCI controllers require HC_CONTROL_ABORT to be asserted
before a DMA ring abort is effective.  This behavior is non-standard.
Introduce a controller quirk to select the required abort method and
enable it for Intel LPSS I3C controllers.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260603090754.16252-12-adrian.hunter@intel.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
This commit is contained in:
Adrian Hunter 2026-06-03 12:07:48 +03:00 committed by Alexandre Belloni
parent 5d38555049
commit 352d89067f
3 changed files with 33 additions and 4 deletions
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18
drivers/i3c/master/mipi-i3c-hci/core.c
View File

@ -231,7 +231,20 @@ static void i3c_hci_bus_cleanup(struct i3c_master_controller *m)
void mipi_i3c_hci_resume(struct i3c_hci *hci)
{
reg_set(HC_CONTROL, HC_CONTROL_RESUME);
u32 reg = reg_read(HC_CONTROL);
reg |= HC_CONTROL_RESUME;
reg &= ~HC_CONTROL_ABORT;
reg_write(HC_CONTROL, reg);
}
void mipi_i3c_hci_abort(struct i3c_hci *hci)
{
u32 reg = reg_read(HC_CONTROL);
reg &= ~HC_CONTROL_RESUME; /* Do not set resume */
reg |= HC_CONTROL_ABORT;
reg_write(HC_CONTROL, reg);
}
/* located here rather than pio.c because needed bits are in core reg space */
@ -1053,7 +1066,8 @@ static const struct platform_device_id i3c_hci_driver_ids[] = {
{ .name = "intel-lpss-i3c", HCI_QUIRK_RPM_ALLOWED |
HCI_QUIRK_RPM_IBI_ALLOWED |
HCI_QUIRK_RPM_PARENT_MANAGED |
HCI_QUIRK_DMA_ABORT_REQUIRES_PIO_RESET },
HCI_QUIRK_DMA_ABORT_REQUIRES_PIO_RESET |
HCI_QUIRK_DMA_REQUIRES_HC_ABORT },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(platform, i3c_hci_driver_ids);

17
drivers/i3c/master/mipi-i3c-hci/dma.c
View File

@ -597,8 +597,21 @@ static void hci_dma_xfer_done(struct i3c_hci *hci, struct hci_rh_data *rh)
rh_reg_write(RING_OPERATION1, op1_val);
}
static void hci_dma_abort(struct hci_rh_data *rh)
static void hci_dma_requires_hc_abort_quirk(struct i3c_hci *hci, struct hci_rh_data *rh)
{
reinit_completion(&rh->op_done);
mipi_i3c_hci_abort(hci);
wait_for_completion_timeout(&rh->op_done, HZ);
rh_reg_write(RING_CONTROL, rh_reg_read(RING_CONTROL) | RING_CTRL_ABORT);
}
static void hci_dma_abort(struct i3c_hci *hci, struct hci_rh_data *rh)
{
if (hci->quirks & HCI_QUIRK_DMA_REQUIRES_HC_ABORT) {
hci_dma_requires_hc_abort_quirk(hci, rh);
return;
}
reinit_completion(&rh->op_done);
rh_reg_write(RING_CONTROL, rh_reg_read(RING_CONTROL) | RING_CTRL_ABORT);
wait_for_completion_timeout(&rh->op_done, HZ);
@ -630,7 +643,7 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci,
hci->enqueue_blocked = true;
spin_unlock_irq(&hci->lock);
/* stop the ring */
hci_dma_abort(rh);
hci_dma_abort(hci, rh);
spin_lock_irq(&hci->lock);
ring_status = rh_reg_read(RING_STATUS);
if (ring_status & RING_STATUS_RUNNING) {

2
drivers/i3c/master/mipi-i3c-hci/hci.h
View File

@ -157,9 +157,11 @@ struct i3c_hci_dev_data {
#define HCI_QUIRK_RPM_IBI_ALLOWED BIT(6) /* IBI and Hot-Join allowed while runtime suspended */
#define HCI_QUIRK_RPM_PARENT_MANAGED BIT(7) /* Runtime PM managed by parent device */
#define HCI_QUIRK_DMA_ABORT_REQUIRES_PIO_RESET BIT(8) /* Do PIO queue SW resets after DMA abort */
#define HCI_QUIRK_DMA_REQUIRES_HC_ABORT BIT(9) /* Use HC_CONTROL ABORT to abort DMA */
/* global functions */
void mipi_i3c_hci_resume(struct i3c_hci *hci);
void mipi_i3c_hci_abort(struct i3c_hci *hci);
void mipi_i3c_hci_pio_reset(struct i3c_hci *hci);
void mipi_i3c_hci_pio_reset_all_queues(struct i3c_hci *hci);
void mipi_i3c_hci_dct_index_reset(struct i3c_hci *hci);