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ARM: dts: DRA7: Add dt nodes for PWMSS

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Add PWMSS device tree nodes for DRA7 SoC family and add documentation
for dt bindings.

Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Add eCAP and use updated bindings for PWMSS and ePWM]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Vignesh R 2016-05-03 10:56:55 -05:00 committed by Tony Lindgren
parent 58bfbea5b1
commit 3437014233
4 changed files with 120 additions and 0 deletions
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9
Documentation/devicetree/bindings/pwm/pwm-tiecap.txt
View File

@ -5,6 +5,7 @@ Required properties:
for am33xx - compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
for am4372 - compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
for da850 - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
the cells format. The PWM channel index ranges from 0 to 4. The only third
cell flag supported by this binding is PWM_POLARITY_INVERTED.
@ -38,3 +39,11 @@ ecap0: ecap@1f06000 { /* ECAP on da850 */
#pwm-cells = <3>;
reg = <0x1f06000 0x80>;
};
ecap0: ecap@4843e100 {
compatible = "ti,dra746-ecap", "ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x4843e100 0x80>;
clocks = <&l4_root_clk_div>;
clock-names = "fck";
};

9
Documentation/devicetree/bindings/pwm/pwm-tiehrpwm.txt
View File

@ -5,6 +5,7 @@ Required properties:
for am33xx - compatible = "ti,am3352-ehrpwm", "ti,am33xx-ehrpwm";
for am4372 - compatible = "ti,am4372-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
the cells format. The only third cell flag supported by this binding is
PWM_POLARITY_INVERTED.
@ -38,3 +39,11 @@ ehrpwm0: pwm@1f00000 { /* EHRPWM on da850 */
#pwm-cells = <3>;
reg = <0x1f00000 0x2000>;
};
ehrpwm0: pwm@4843e200 { /* EHRPWM on dra746 */
compatible = "ti,dra746-ehrpwm", "ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x4843e200 0x80>;
clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;
clock-names = "tbclk", "fck";
};

12
Documentation/devicetree/bindings/pwm/pwm-tipwmss.txt
View File

@ -4,6 +4,7 @@ Required properties:
- compatible: Must be "ti,<soc>-pwmss".
for am33xx - compatible = "ti,am33xx-pwmss";
for am4372 - compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
for dra746 - compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss"
- reg: physical base address and size of the registers map.
- address-cells: Specify the number of u32 entries needed in child nodes.
@ -46,3 +47,14 @@ epwmss0: epwmss@48300000 { /* PWMSS for am4372 */
/* child nodes go here */
};
epwmss0: epwmss@4843e000 { /* PWMSS for DRA7xx */
compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
reg = <0x4843e000 0x30>;
ti,hwmods = "epwmss0";
#address-cells = <1>;
#size-cells = <1>;
ranges;
/* child nodes go here */
};

90
arch/arm/boot/dts/dra7.dtsi
View File

@ -1743,6 +1743,96 @@ hdmi: encoder@58060000 {
clock-names = "fck", "sys_clk";
};
};
epwmss0: epwmss@4843e000 {
compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
reg = <0x4843e000 0x30>;
ti,hwmods = "epwmss0";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges;
ehrpwm0: pwm@4843e200 {
compatible = "ti,dra746-ehrpwm",
"ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x4843e200 0x80>;
clocks = <&ehrpwm0_tbclk>, <&l4_root_clk_div>;
clock-names = "tbclk", "fck";
status = "disabled";
};
ecap0: ecap@4843e100 {
compatible = "ti,dra746-ecap",
"ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x4843e100 0x80>;
clocks = <&l4_root_clk_div>;
clock-names = "fck";
status = "disabled";
};
};
epwmss1: epwmss@48440000 {
compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
reg = <0x48440000 0x30>;
ti,hwmods = "epwmss1";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges;
ehrpwm1: pwm@48440200 {
compatible = "ti,dra746-ehrpwm",
"ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x48440200 0x80>;
clocks = <&ehrpwm1_tbclk>, <&l4_root_clk_div>;
clock-names = "tbclk", "fck";
status = "disabled";
};
ecap1: ecap@48440100 {
compatible = "ti,dra746-ecap",
"ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x48440100 0x80>;
clocks = <&l4_root_clk_div>;
clock-names = "fck";
status = "disabled";
};
};
epwmss2: epwmss@48442000 {
compatible = "ti,dra746-pwmss", "ti,am33xx-pwmss";
reg = <0x48442000 0x30>;
ti,hwmods = "epwmss2";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges;
ehrpwm2: pwm@48442200 {
compatible = "ti,dra746-ehrpwm",
"ti,am3352-ehrpwm";
#pwm-cells = <3>;
reg = <0x48442200 0x80>;
clocks = <&ehrpwm2_tbclk>, <&l4_root_clk_div>;
clock-names = "tbclk", "fck";
status = "disabled";
};
ecap2: ecap@48442100 {
compatible = "ti,dra746-ecap",
"ti,am3352-ecap";
#pwm-cells = <3>;
reg = <0x48442100 0x80>;
clocks = <&l4_root_clk_div>;
clock-names = "fck";
status = "disabled";
};
};
};
thermal_zones: thermal-zones {