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dt-bindings: pinctrl: Add starfive,jhb100-per3-pinctrl
Add pinctrl bindings for StarFive JHB100 SoC Peripheral-3(per3) pinctrl controller. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/starfive,jhb100-per3-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive JHB100 Peripheral-3 Pin Controller
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description: |
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Pinctrl bindings for JHB100 RISC-V SoC from StarFive Technology Ltd.
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The JHB100 SoC has 13 pinctrl domains - sys0, sys0h, sys1, sys2, per0, per1,
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per2, per2pok, per3, adc0, adc1, emmc, and vga.
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This document provides an overview of the "per3" pinctrl domain.
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The "per3" domain has a pin controller which provides
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- function selection for GPIO pads.
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- GPIO interrupt handling.
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In the Peripheral-3 Pin Controller, there are 11 multi-function GPIO_PADs.
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Each of them can be multiplexed to several peripherals through function
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selection. Each iopad has a maximum of up to 2 functions - 0 and 1.
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Function 0 is the default function which is generally the GPIO function.
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Function 1 is the alternate function or peripheral signal that can be
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routed to an iopad. The function selection can be carried out by writing
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the function number to the iopad function select register.
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Each iopad is configurable with parameters such as input-enable, internal
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pull-up/pull-down bias, drive strength, schmitt trigger, slew rate, input
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debounce nanoseconds, power source.
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maintainers:
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- Changhuang Liang <changhuang.liang@starfivetech.com>
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properties:
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compatible:
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items:
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- const: starfive,jhb100-per3-pinctrl
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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interrupts:
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maxItems: 1
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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gpio-controller: true
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'#gpio-cells':
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const: 2
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gpio-ranges: true
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gpio-line-names: true
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patternProperties:
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'-grp$':
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type: object
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additionalProperties: false
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patternProperties:
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'-pins$':
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type: object
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description: |
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A pinctrl node should contain at least one subnode representing the
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pinctrl groups available in the domain. Each subnode will list the
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pins it needs, and how they should be configured, with regard to
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function selection, bias, input enable/disable, input schmitt
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trigger enable/disable, slew-rate, input debounce nanoseconds,
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power-source and drive-strength.
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allOf:
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- $ref: /schemas/pinctrl/pincfg-node.yaml
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- $ref: /schemas/pinctrl/pinmux-node.yaml
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additionalProperties: false
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properties:
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pins:
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description:
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The list of IOs that properties in the pincfg node apply to.
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function:
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description:
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A string containing the name of the function to mux for these
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pins.
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enum: [ gmac_mdio, gmac_rmii, gpio ]
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bias-disable: true
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bias-pull-down:
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type: boolean
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bias-pull-up:
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type: boolean
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drive-strength:
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enum: [ 2, 4, 8, 12 ]
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drive-strength-microamp:
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enum: [ 2000, 4000, 8000, 12000 ]
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input-debounce-ns:
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minimum: 0
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maximum: 10485680
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description:
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Debounce time in nanoseconds. The hardware counts in 80 ns
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stages with a 17-bit counter, so the maximum is 10485680 ns.
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input-disable: true
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input-enable: true
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input-schmitt-enable: true
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input-schmitt-disable: true
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power-source:
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enum: [ 1800, 2500, 3300 ]
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description: I/O voltage in millivolt.
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slew-rate:
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enum: [ 0, 1 ]
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default: 0
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description: |
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0: slow
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1: fast
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required:
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- compatible
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- reg
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- resets
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- interrupts
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- interrupt-controller
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- '#interrupt-cells'
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- gpio-controller
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- '#gpio-cells'
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- gpio-ranges
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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pinctrl_per3: pinctrl@11c42000 {
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compatible = "starfive,jhb100-per3-pinctrl";
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reg = <0x0 0x11c42000 0x0 0x1000>;
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resets = <&per3crg 6>;
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interrupts = <64>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&pinctrl_per3 0 0 11>;
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};
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};
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