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arm64: dts: imx8mm-kontron: Add DL (Display-Line) overlay with LVDS support

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The Kontron Electronics DL i.MX8MM consists of the BL i.MX8MM board
and a 7" LVDS panel. Provide an overlay that enables the panel.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Frieder Schrempf 2024-10-08 16:37:46 +02:00 committed by Shawn Guo
parent 3885c18fdb
commit 33e18fc471
2 changed files with 193 additions and 0 deletions
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4
arch/arm64/boot/dts/freescale/Makefile
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@ -268,6 +268,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb
dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb
imx8mm-kontron-dl-dtbs := imx8mm-kontron-bl.dtb imx8mm-kontron-dl.dtbo
dtb-$(CONFIG_ARCH_MXC) += imx8mm-kontron-dl.dtb
imx8mm-venice-gw72xx-0x-imx219-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-imx219.dtbo
imx8mm-venice-gw72xx-0x-rpidsi-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rpidsi.dtbo
imx8mm-venice-gw72xx-0x-rs232-rts-dtbs := imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs232-rts.dtbo

189
arch/arm64/boot/dts/freescale/imx8mm-kontron-dl.dtso Normal file
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@ -0,0 +1,189 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2024 Kontron Electronics GmbH
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/gpio/gpio.h>
#include "imx8mm-pinfunc.h"
&{/} {
compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 50000 0>;
brightness-levels = <0 100>;
num-interpolated-steps = <100>;
default-brightness-level = <100>;
};
panel {
compatible = "jenson,bl-jt60050-01a", "panel-lvds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_panel>;
backlight = <&backlight>;
data-mapping = "vesa-24";
enable-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
height-mm = <86>;
width-mm = <154>;
panel-timing {
clock-frequency = <51200000>;
hactive = <1024>;
vactive = <600>;
hsync-len = <1>;
hfront-porch = <160>;
hback-porch = <160>;
vsync-len = <1>;
vfront-porch = <12>;
vback-porch = <23>;
};
port {
panel_out_bridge: endpoint {
remote-endpoint = <&bridge_out_panel>;
};
};
};
};
&dsi_mux_sel_hdmi {
status = "disabled";
};
&dsi_mux_sel_lvds {
status = "okay";
};
&mipi_dsi_out {
remote-endpoint = <&bridge_in_dsi_lvds>;
};
&gpio3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio3>;
panel-rst-hog {
gpio-hog;
gpios = <20 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "panel-reset";
};
panel-stby-hog {
gpio-hog;
gpios = <21 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "panel-standby";
};
panel-hinv-hog {
gpio-hog;
gpios = <24 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "panel-horizontal-invert";
};
panel-vinv-hog {
gpio-hog;
gpios = <25 GPIO_ACTIVE_HIGH>;
output-low;
line-name = "panel-vertical-invert";
};
};
&hdmi {
status = "disabled";
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
touchscreen@5d {
compatible = "goodix,gt928";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_touch>;
interrupt-parent = <&gpio3>;
interrupts = <22 8>;
reset-gpios = <&gpio3 23 0>;
irq-gpios = <&gpio3 22 0>;
};
};
&lvds {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
bridge_in_dsi_lvds: endpoint {
remote-endpoint = <&mipi_dsi_out>;
data-lanes = <1 2>;
};
};
port@2 {
reg = <2>;
bridge_out_panel: endpoint {
remote-endpoint = <&panel_out_bridge>;
};
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&iomuxc {
pinctrl_gpio3: gpio3grp {
fsl,pins = <
MX8MM_IOMUXC_SAI5_RXD3_GPIO3_IO24 0x19
MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x19
MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21 0x19
MX8MM_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x19
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000083
MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000083
>;
};
pinctrl_panel: panelgrp {
fsl,pins = <
MX8MM_IOMUXC_SAI5_RXFS_GPIO3_IO19 0x19
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x6
>;
};
pinctrl_touch: touchgrp {
fsl,pins = <
MX8MM_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x19
MX8MM_IOMUXC_SAI5_RXD2_GPIO3_IO23 0x19
>;
};
};