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net: stmmac: more mode -> descriptor_mode renames
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Link: https://patch.msgid.link/E1w2vbL-0000000DbWW-0PON@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
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1939749ce9
commit
33be7846e4
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@ -289,12 +289,13 @@ static int dwmac4_wrback_get_rx_timestamp_status(void *desc, void *next_desc,
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}
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static void dwmac4_rd_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
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int mode, int end, int bfsize)
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u8 descriptor_mode, int end, int bfsize)
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{
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dwmac4_set_rx_owner(p, disable_rx_ic);
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}
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static void dwmac4_rd_init_tx_desc(struct dma_desc *p, int mode, int end)
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static void dwmac4_rd_init_tx_desc(struct dma_desc *p, u8 descriptor_mode,
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int end)
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{
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p->des0 = 0;
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p->des1 = 0;
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@ -303,8 +304,9 @@ static void dwmac4_rd_init_tx_desc(struct dma_desc *p, int mode, int end)
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}
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static void dwmac4_rd_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
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bool csum_flag, int mode, bool tx_own,
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bool ls, unsigned int tot_pkt_len)
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bool csum_flag, u8 descriptor_mode,
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bool tx_own, bool ls,
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unsigned int tot_pkt_len)
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{
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u32 tdes3 = le32_to_cpu(p->des3);
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@ -381,7 +383,7 @@ static void dwmac4_rd_prepare_tso_tx_desc(struct dma_desc *p, int is_fs,
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p->des3 = cpu_to_le32(tdes3);
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}
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static void dwmac4_release_tx_desc(struct dma_desc *p, int mode)
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static void dwmac4_release_tx_desc(struct dma_desc *p, u8 descriptor_mode)
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{
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p->des0 = 0;
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p->des1 = 0;
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@ -130,12 +130,13 @@ static int dwxgmac2_get_rx_timestamp_status(void *desc, void *next_desc,
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}
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static void dwxgmac2_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
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int mode, int end, int bfsize)
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u8 descriptor_mode, int end, int bfsize)
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{
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dwxgmac2_set_rx_owner(p, disable_rx_ic);
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}
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static void dwxgmac2_init_tx_desc(struct dma_desc *p, int mode, int end)
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static void dwxgmac2_init_tx_desc(struct dma_desc *p, u8 descriptor_mode,
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int end)
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{
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p->des0 = 0;
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p->des1 = 0;
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@ -144,8 +145,9 @@ static void dwxgmac2_init_tx_desc(struct dma_desc *p, int mode, int end)
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}
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static void dwxgmac2_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
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bool csum_flag, int mode, bool tx_own,
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bool ls, unsigned int tot_pkt_len)
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bool csum_flag, u8 descriptor_mode,
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bool tx_own, bool ls,
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unsigned int tot_pkt_len)
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{
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u32 tdes3 = le32_to_cpu(p->des3);
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@ -219,7 +221,7 @@ static void dwxgmac2_prepare_tso_tx_desc(struct dma_desc *p, int is_fs,
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p->des3 = cpu_to_le32(tdes3);
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}
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static void dwxgmac2_release_tx_desc(struct dma_desc *p, int mode)
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static void dwxgmac2_release_tx_desc(struct dma_desc *p, u8 descriptor_mode)
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{
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p->des0 = 0;
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p->des1 = 0;
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@ -245,7 +245,7 @@ static int enh_desc_get_rx_status(struct stmmac_extra_stats *x,
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}
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static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
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int mode, int end, int bfsize)
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u8 descriptor_mode, int end, int bfsize)
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{
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int bfsize1;
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@ -254,7 +254,7 @@ static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
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bfsize1 = min(bfsize, BUF_SIZE_8KiB);
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p->des1 |= cpu_to_le32(bfsize1 & ERDES1_BUFFER1_SIZE_MASK);
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if (mode == STMMAC_CHAIN_MODE)
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if (descriptor_mode == STMMAC_CHAIN_MODE)
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ehn_desc_rx_set_on_chain(p);
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else
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ehn_desc_rx_set_on_ring(p, end, bfsize);
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@ -263,10 +263,11 @@ static void enh_desc_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
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p->des1 |= cpu_to_le32(ERDES1_DISABLE_IC);
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}
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static void enh_desc_init_tx_desc(struct dma_desc *p, int mode, int end)
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static void enh_desc_init_tx_desc(struct dma_desc *p, u8 descriptor_mode,
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int end)
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{
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p->des0 &= cpu_to_le32(~ETDES0_OWN);
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if (mode == STMMAC_CHAIN_MODE)
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if (descriptor_mode == STMMAC_CHAIN_MODE)
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enh_desc_end_tx_desc_on_chain(p);
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else
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enh_desc_end_tx_desc_on_ring(p, end);
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@ -282,24 +283,25 @@ static void enh_desc_set_rx_owner(struct dma_desc *p, int disable_rx_ic)
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p->des0 |= cpu_to_le32(RDES0_OWN);
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}
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static void enh_desc_release_tx_desc(struct dma_desc *p, int mode)
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static void enh_desc_release_tx_desc(struct dma_desc *p, u8 descriptor_mode)
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{
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int ter = (le32_to_cpu(p->des0) & ETDES0_END_RING) >> 21;
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memset(p, 0, offsetof(struct dma_desc, des2));
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if (mode == STMMAC_CHAIN_MODE)
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if (descriptor_mode == STMMAC_CHAIN_MODE)
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enh_desc_end_tx_desc_on_chain(p);
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else
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enh_desc_end_tx_desc_on_ring(p, ter);
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}
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static void enh_desc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
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bool csum_flag, int mode, bool tx_own,
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bool ls, unsigned int tot_pkt_len)
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bool csum_flag, u8 descriptor_mode,
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bool tx_own, bool ls,
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unsigned int tot_pkt_len)
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{
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u32 tdes0 = le32_to_cpu(p->des0);
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if (mode == STMMAC_CHAIN_MODE)
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if (descriptor_mode == STMMAC_CHAIN_MODE)
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enh_set_tx_desc_len_on_chain(p, len);
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else
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enh_set_tx_desc_len_on_ring(p, len);
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@ -38,21 +38,21 @@ struct dma_edesc;
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/* Descriptors helpers */
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struct stmmac_desc_ops {
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/* DMA RX descriptor ring initialization */
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void (*init_rx_desc)(struct dma_desc *p, int disable_rx_ic, int mode,
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int end, int bfsize);
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void (*init_rx_desc)(struct dma_desc *p, int disable_rx_ic,
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u8 descriptor_mode, int end, int bfsize);
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/* DMA TX descriptor ring initialization */
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void (*init_tx_desc)(struct dma_desc *p, int mode, int end);
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void (*init_tx_desc)(struct dma_desc *p, u8 descriptor_mode, int end);
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/* Invoked by the xmit function to prepare the tx descriptor */
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void (*prepare_tx_desc)(struct dma_desc *p, int is_fs, int len,
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bool csum_flag, int mode, bool tx_own, bool ls,
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unsigned int tot_pkt_len);
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bool csum_flag, u8 descriptor_mode, bool tx_own,
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bool ls, unsigned int tot_pkt_len);
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void (*prepare_tso_tx_desc)(struct dma_desc *p, int is_fs, int len1,
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int len2, bool tx_own, bool ls, unsigned int tcphdrlen,
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unsigned int tcppayloadlen);
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/* Set/get the owner of the descriptor */
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void (*set_tx_owner)(struct dma_desc *p);
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/* Clean the tx descriptor as soon as the tx irq is received */
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void (*release_tx_desc)(struct dma_desc *p, int mode);
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void (*release_tx_desc)(struct dma_desc *p, u8 descriptor_mode);
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/* Clear interrupt on tx frame completion. When this bit is
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* set an interrupt happens as soon as the frame is transmitted */
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void (*set_tx_ic)(struct dma_desc *p);
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@ -108,8 +108,8 @@ static int ndesc_get_rx_status(struct stmmac_extra_stats *x,
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return ret;
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}
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static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode,
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int end, int bfsize)
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static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic,
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u8 descriptor_mode, int end, int bfsize)
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{
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int bfsize1;
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@ -118,7 +118,7 @@ static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode,
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bfsize1 = min(bfsize, BUF_SIZE_2KiB - 1);
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p->des1 |= cpu_to_le32(bfsize1 & RDES1_BUFFER1_SIZE_MASK);
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if (mode == STMMAC_CHAIN_MODE)
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if (descriptor_mode == STMMAC_CHAIN_MODE)
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ndesc_rx_set_on_chain(p, end);
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else
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ndesc_rx_set_on_ring(p, end, bfsize);
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@ -127,10 +127,10 @@ static void ndesc_init_rx_desc(struct dma_desc *p, int disable_rx_ic, int mode,
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p->des1 |= cpu_to_le32(RDES1_DISABLE_IC);
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}
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static void ndesc_init_tx_desc(struct dma_desc *p, int mode, int end)
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static void ndesc_init_tx_desc(struct dma_desc *p, u8 descriptor_mode, int end)
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{
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p->des0 &= cpu_to_le32(~TDES0_OWN);
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if (mode == STMMAC_CHAIN_MODE)
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if (descriptor_mode == STMMAC_CHAIN_MODE)
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ndesc_tx_set_on_chain(p);
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else
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ndesc_end_tx_desc_on_ring(p, end);
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@ -146,20 +146,21 @@ static void ndesc_set_rx_owner(struct dma_desc *p, int disable_rx_ic)
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p->des0 |= cpu_to_le32(RDES0_OWN);
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}
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static void ndesc_release_tx_desc(struct dma_desc *p, int mode)
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static void ndesc_release_tx_desc(struct dma_desc *p, u8 descriptor_mode)
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{
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int ter = (le32_to_cpu(p->des1) & TDES1_END_RING) >> 25;
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memset(p, 0, offsetof(struct dma_desc, des2));
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if (mode == STMMAC_CHAIN_MODE)
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if (descriptor_mode == STMMAC_CHAIN_MODE)
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ndesc_tx_set_on_chain(p);
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else
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ndesc_end_tx_desc_on_ring(p, ter);
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}
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static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
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bool csum_flag, int mode, bool tx_own,
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bool ls, unsigned int tot_pkt_len)
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bool csum_flag, u8 descriptor_mode,
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bool tx_own, bool ls,
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unsigned int tot_pkt_len)
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{
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u32 tdes1 = le32_to_cpu(p->des1);
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@ -176,7 +177,7 @@ static void ndesc_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
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p->des1 = cpu_to_le32(tdes1);
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if (mode == STMMAC_CHAIN_MODE)
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if (descriptor_mode == STMMAC_CHAIN_MODE)
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norm_set_tx_desc_len_on_chain(p, len);
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else
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norm_set_tx_desc_len_on_ring(p, len);
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