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Merge tag 'drm-intel-next-fixes-2024-09-19' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next
- Fix BMG support to UHBR13.5 - Two PSR fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/ZuvzjAbx2pmjahxK@jlahtine-mobl.ger.corp.intel.com
This commit is contained in:
commit
338aae5478
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@ -916,7 +916,7 @@ intel_ddi_main_link_aux_domain(struct intel_digital_port *dig_port,
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* instead of a specific AUX_IO_<port> reference without powering up any
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* extra wells.
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*/
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if (intel_encoder_can_psr(&dig_port->base))
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if (intel_psr_needs_aux_io_power(&dig_port->base, crtc_state))
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return intel_display_power_aux_io_domain(i915, dig_port->aux_ch);
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else if (DISPLAY_VER(i915) < 14 &&
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(intel_crtc_has_dp_encoder(crtc_state) ||
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@ -531,6 +531,10 @@ static void
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intel_dp_set_source_rates(struct intel_dp *intel_dp)
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{
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/* The values must be in increasing order */
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static const int bmg_rates[] = {
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162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
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810000, 1000000, 1350000,
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};
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static const int mtl_rates[] = {
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162000, 216000, 243000, 270000, 324000, 432000, 540000, 675000,
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810000, 1000000, 2000000,
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@ -561,8 +565,13 @@ intel_dp_set_source_rates(struct intel_dp *intel_dp)
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intel_dp->source_rates || intel_dp->num_source_rates);
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if (DISPLAY_VER(dev_priv) >= 14) {
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source_rates = mtl_rates;
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size = ARRAY_SIZE(mtl_rates);
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if (IS_BATTLEMAGE(dev_priv)) {
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source_rates = bmg_rates;
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size = ARRAY_SIZE(bmg_rates);
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} else {
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source_rates = mtl_rates;
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size = ARRAY_SIZE(mtl_rates);
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}
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max_rate = mtl_max_source_rate(intel_dp);
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} else if (DISPLAY_VER(dev_priv) >= 11) {
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source_rates = icl_rates;
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@ -203,6 +203,25 @@ bool intel_encoder_can_psr(struct intel_encoder *encoder)
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return false;
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}
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bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state)
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{
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/*
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* For PSR/PR modes only eDP requires the AUX IO power to be enabled whenever
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* the output is enabled. For non-eDP outputs the main link is always
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* on, hence it doesn't require the HW initiated AUX wake-up signaling used
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* for eDP.
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*
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* TODO:
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* - Consider leaving AUX IO disabled for eDP / PR as well, in case
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* the ALPM with main-link off mode is not enabled.
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* - Leave AUX IO enabled for DP / PR, once support for ALPM with
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* main-link off mode is added for it and this mode gets enabled.
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*/
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return intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
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intel_encoder_can_psr(encoder);
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}
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static bool psr_global_enabled(struct intel_dp *intel_dp)
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{
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struct intel_display *display = to_intel_display(intel_dp);
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@ -2784,13 +2803,6 @@ static int _psr1_ready_for_pipe_update_locked(struct intel_dp *intel_dp)
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EDP_PSR_STATUS_STATE_MASK, 50);
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}
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static int _panel_replay_ready_for_pipe_update_locked(struct intel_dp *intel_dp)
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{
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return intel_dp_is_edp(intel_dp) ?
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_psr2_ready_for_pipe_update_locked(intel_dp) :
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_psr1_ready_for_pipe_update_locked(intel_dp);
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}
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/**
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* intel_psr_wait_for_idle_locked - wait for PSR be ready for a pipe update
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* @new_crtc_state: new CRTC state
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@ -2813,12 +2825,10 @@ void intel_psr_wait_for_idle_locked(const struct intel_crtc_state *new_crtc_stat
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lockdep_assert_held(&intel_dp->psr.lock);
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if (!intel_dp->psr.enabled)
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if (!intel_dp->psr.enabled || intel_dp->psr.panel_replay_enabled)
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continue;
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if (intel_dp->psr.panel_replay_enabled)
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ret = _panel_replay_ready_for_pipe_update_locked(intel_dp);
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else if (intel_dp->psr.sel_update_enabled)
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if (intel_dp->psr.sel_update_enabled)
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ret = _psr2_ready_for_pipe_update_locked(intel_dp);
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else
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ret = _psr1_ready_for_pipe_update_locked(intel_dp);
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@ -25,6 +25,8 @@ struct intel_plane_state;
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(intel_dp)->psr.source_panel_replay_support)
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bool intel_encoder_can_psr(struct intel_encoder *encoder);
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bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_psr_init_dpcd(struct intel_dp *intel_dp);
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void intel_psr_enable_sink(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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