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media: hantro: Convert imx8m_vpu_g2_irq to helper

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It turns out that imx8m_vpu_g2_irq() doesn't depend on any platform
specifics and can be used with other G2 platform drivers too.

Move it to common code.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
Jernej Skrabec 2021-11-29 19:26:30 +01:00 committed by Mauro Carvalho Chehab
parent 3c5b218c36
commit 3385c514ec
3 changed files with 20 additions and 19 deletions
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18
drivers/staging/media/hantro/hantro_g2.c
View File

@ -24,3 +24,21 @@ void hantro_g2_check_idle(struct hantro_dev *vpu)
} }
} }
} }
irqreturn_t hantro_g2_irq(int irq, void *dev_id)
{
struct hantro_dev *vpu = dev_id;
enum vb2_buffer_state state;
u32 status;
status = vdpu_read(vpu, G2_REG_INTERRUPT);
state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ?
VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
vdpu_write(vpu, 0, G2_REG_INTERRUPT);
vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG);
hantro_irq_done(vpu, state);
return IRQ_HANDLED;
}

1
drivers/staging/media/hantro/hantro_hw.h
View File

@ -425,5 +425,6 @@ void hantro_g2_vp9_dec_done(struct hantro_ctx *ctx);
int hantro_vp9_dec_init(struct hantro_ctx *ctx); int hantro_vp9_dec_init(struct hantro_ctx *ctx);
void hantro_vp9_dec_exit(struct hantro_ctx *ctx); void hantro_vp9_dec_exit(struct hantro_ctx *ctx);
void hantro_g2_check_idle(struct hantro_dev *vpu); void hantro_g2_check_idle(struct hantro_dev *vpu);
irqreturn_t hantro_g2_irq(int irq, void *dev_id);
#endif /* HANTRO_HW_H_ */ #endif /* HANTRO_HW_H_ */

20
drivers/staging/media/hantro/imx8m_vpu_hw.c
View File

@ -191,24 +191,6 @@ static irqreturn_t imx8m_vpu_g1_irq(int irq, void *dev_id)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static irqreturn_t imx8m_vpu_g2_irq(int irq, void *dev_id)
{
struct hantro_dev *vpu = dev_id;
enum vb2_buffer_state state;
u32 status;
status = vdpu_read(vpu, G2_REG_INTERRUPT);
state = (status & G2_REG_INTERRUPT_DEC_RDY_INT) ?
VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
vdpu_write(vpu, 0, G2_REG_INTERRUPT);
vdpu_write(vpu, G2_REG_CONFIG_DEC_CLK_GATE_E, G2_REG_CONFIG);
hantro_irq_done(vpu, state);
return IRQ_HANDLED;
}
static int imx8mq_vpu_hw_init(struct hantro_dev *vpu) static int imx8mq_vpu_hw_init(struct hantro_dev *vpu)
{ {
vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1];
@ -280,7 +262,7 @@ static const struct hantro_irq imx8mq_irqs[] = {
}; };
static const struct hantro_irq imx8mq_g2_irqs[] = { static const struct hantro_irq imx8mq_g2_irqs[] = {
{ "g2", imx8m_vpu_g2_irq }, { "g2", hantro_g2_irq },
}; };
static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" };