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drm/amd/display: Update dcn351 debug flags and function pointers

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[why & how]
There are potential issues with Z8 and IPS
that need to be addressed and need to add
in missing function pointers.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sung Joon Kim 2024-04-12 11:19:50 -04:00 committed by Alex Deucher
parent ffda708148
commit 337b0a3d49
2 changed files with 3 additions and 2 deletions
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1
drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c
View File

@ -121,6 +121,7 @@ static const struct hw_sequencer_funcs dcn351_funcs = {
.hw_block_power_up = dcn351_hw_block_power_up,
.hw_block_power_down = dcn351_hw_block_power_down,
.root_clock_control = dcn35_root_clock_control,
.set_long_vtotal = dcn35_set_long_vblank,
};
static const struct hwseq_private_funcs dcn351_private_funcs = {

4
drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c
View File

@ -744,7 +744,7 @@ static const struct dc_debug_options debug_defaults_drv = {
},
.seamless_boot_odm_combine = DML_FAIL_SOURCE_PIXEL_FORMAT,
.enable_z9_disable_interface = true, /* Allow support for the PMFW interface for disable Z9*/
.minimum_z8_residency_time = 2100,
.minimum_z8_residency_time = 1,
.using_dml2 = true,
.support_eDP1_5 = true,
.enable_hpo_pg_support = false,
@ -763,7 +763,7 @@ static const struct dc_debug_options debug_defaults_drv = {
.psp_disabled_wa = true,
.ips2_eval_delay_us = 2000,
.ips2_entry_delay_us = 800,
.disable_dmub_reallow_idle = true,
.disable_dmub_reallow_idle = false,
.static_screen_wait_frames = 2,
};