drm/bridge: analogix_dp: Apply standard DP training delay helpers

Replace hardcoded fixed usleep_range() delays during clock recovery and
channel equalization with drm_dp_link_train_clock_recovery_delay()
and drm_dp_link_train_channel_eq_delay() helpers.

The original fixed delays are only valid for the case where bit[6:0] of
DPCD TRAINING_AUX_RD_INTERVAL(0000Eh) is 0x00, while core helpers apply
spec-compliant timings matching actual receiver capability values.

Additionally, add dpcd buffer to struct analogix_dp_device to cache
receiver capabilities. Call drm_dp_read_dpcd_caps() at commit entry to
populate cached DPCD data for subsequent link training steps, and
prepare for further usage of other DP helper APIs.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Tested-by: Vicente Bergas <vicencb@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20260623075207.320603-1-damon.ding@rock-chips.com
This commit is contained in:
Damon Ding 2026-06-23 15:52:07 +08:00 committed by Heiko Stuebner
parent 903f8773ee
commit 337038d31c
2 changed files with 10 additions and 2 deletions

View File

@ -328,7 +328,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
u8 voltage_swing, pre_emphasis, training_lane;
u8 link_status[DP_LINK_STATUS_SIZE];
usleep_range(100, 101);
drm_dp_link_train_clock_recovery_delay(&dp->aux, dp->dpcd);
lane_count = dp->link_train.lane_count;
@ -389,7 +389,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
u32 reg;
u8 link_status[DP_LINK_STATUS_SIZE];
usleep_range(400, 401);
drm_dp_link_train_channel_eq_delay(&dp->aux, dp->dpcd);
lane_count = dp->link_train.lane_count;
@ -750,6 +750,12 @@ static int analogix_dp_commit(struct analogix_dp_device *dp)
{
int ret;
ret = drm_dp_read_dpcd_caps(&dp->aux, dp->dpcd);
if (ret < 0) {
dev_err(dp->dev, "failed to read dpcd caps: %d\n", ret);
return ret;
}
ret = analogix_dp_train_link(dp);
if (ret) {
dev_err(dp->dev, "unable to do link train, ret=%d\n", ret);

View File

@ -169,6 +169,8 @@ struct analogix_dp_device {
bool fast_train_enable;
bool psr_supported;
u8 dpcd[DP_RECEIVER_CAP_SIZE];
struct analogix_dp_plat_data *plat_data;
};