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arm64: dts: qcom: sdm630: Add thermal-zones configuration

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Add a basic thermal-zones configuration to make sure the SoC
doesn't overheat itself to death.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210728222542.54269-17-konrad.dybcio@somainline.org
[bjorn: Sorted thermal-zones below "soc"]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Konrad Dybcio 2021-07-29 00:25:19 +02:00 committed by Bjorn Andersson
parent c823676759
commit 3332c59649
1 changed files with 173 additions and 0 deletions
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173
arch/arm64/boot/dts/qcom/sdm630.dtsi
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@ -1808,6 +1808,179 @@ tcsr_mutex: hwlock {
#hwlock-cells = <1>;
};
thermal-zones {
aoss-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 0>;
trips {
aoss_alert0: trip-point0 {
temperature = <105000>;
hysteresis = <1000>;
type = "hot";
};
};
};
cpuss0-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 1>;
trips {
cpuss0_alert0: trip-point0 {
temperature = <125000>;
hysteresis = <1000>;
type = "hot";
};
};
};
cpuss1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 2>;
trips {
cpuss1_alert0: trip-point0 {
temperature = <125000>;
hysteresis = <1000>;
type = "hot";
};
};
};
cpu0-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 3>;
trips {
cpu0_alert0: trip-point0 {
temperature = <70000>;
hysteresis = <1000>;
type = "passive";
};
cpu0_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu1-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 4>;
trips {
cpu1_alert0: trip-point0 {
temperature = <70000>;
hysteresis = <1000>;
type = "passive";
};
cpu1_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu2-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 5>;
trips {
cpu2_alert0: trip-point0 {
temperature = <70000>;
hysteresis = <1000>;
type = "passive";
};
cpu2_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
cpu3-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 6>;
trips {
cpu3_alert0: trip-point0 {
temperature = <70000>;
hysteresis = <1000>;
type = "passive";
};
cpu3_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
/*
* According to what downstream DTS says,
* the entire power efficient cluster has
* only a single thermal sensor.
*/
pwr-cluster-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 7>;
trips {
pwr_cluster_alert0: trip-point0 {
temperature = <70000>;
hysteresis = <1000>;
type = "passive";
};
pwr_cluster_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
};
gpu-thermal {
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&tsens 8>;
trips {
gpu_alert0: trip-point0 {
temperature = <90000>;
hysteresis = <1000>;
type = "hot";
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 1 0xf08>,