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drm/i915: Introduce a minimal plane error state

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I want to capture a little bit more information about the state
of the plane upon faults. To that end introduce a small plane error
state struct and provide per-plane vfuncs to read it out.

For now we just stick the CTL, SURF, and SURFLIVE (if available)
registers contents in there.

v2: Use struct intel_display instead of dev_priv

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250217070047.953-3-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2025-02-17 09:00:41 +02:00
parent 63f39ad858
commit 32ed4660f1
5 changed files with 122 additions and 0 deletions
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41
drivers/gpu/drm/i915/display/i9xx_plane.c
View File

@ -557,6 +557,40 @@ static void i9xx_plane_disable_arm(struct intel_dsb *dsb,
intel_de_write_fw(display, DSPADDR(display, i9xx_plane), 0);
}
static void g4x_primary_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane));
error->surflive = intel_de_read(display, DSPSURFLIVE(display, i9xx_plane));
}
static void i965_plane_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane));
}
static void i8xx_plane_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
error->surf = intel_de_read(display, DSPADDR(display, i9xx_plane));
}
static void
g4x_primary_async_flip(struct intel_dsb *dsb,
struct intel_plane *plane,
@ -976,6 +1010,13 @@ intel_primary_plane_create(struct intel_display *display, enum pipe pipe)
plane->get_hw_state = i9xx_plane_get_hw_state;
plane->check_plane = i9xx_plane_check;
if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
plane->capture_error = g4x_primary_capture_error;
else if (DISPLAY_VER(display) >= 4)
plane->capture_error = i965_plane_capture_error;
else
plane->capture_error = i8xx_plane_capture_error;
if (HAS_ASYNC_FLIPS(display)) {
if (display->platform.valleyview || display->platform.cherryview) {
plane->async_flip = vlv_primary_async_flip;

26
drivers/gpu/drm/i915/display/intel_cursor.c
View File

@ -765,6 +765,27 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
return ret;
}
static void g4x_cursor_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));
error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));
error->surflive = intel_de_read(display, CURSURFLIVE(display, crtc->pipe));
}
static void i9xx_cursor_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));
error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));
}
static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
u32 format, u64 modifier)
{
@ -1030,6 +1051,11 @@ intel_cursor_plane_create(struct intel_display *display,
cursor->check_plane = i9xx_check_cursor;
}
if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
cursor->capture_error = g4x_cursor_capture_error;
else
cursor->capture_error = i9xx_cursor_capture_error;
cursor->cursor.base = ~0;
cursor->cursor.cntl = ~0;

7
drivers/gpu/drm/i915/display/intel_display_types.h
View File

@ -1437,6 +1437,10 @@ struct intel_crtc {
bool block_dc_for_vblank;
};
struct intel_plane_error {
u32 ctl, surf, surflive;
};
struct intel_plane {
struct drm_plane base;
enum i9xx_plane_id i9xx_plane;
@ -1488,6 +1492,9 @@ struct intel_plane {
void (*disable_arm)(struct intel_dsb *dsb,
struct intel_plane *plane,
const struct intel_crtc_state *crtc_state);
void (*capture_error)(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error);
bool (*get_hw_state)(struct intel_plane *plane, enum pipe *pipe);
int (*check_plane)(struct intel_crtc_state *crtc_state,
struct intel_plane_state *plane_state);

36
drivers/gpu/drm/i915/display/intel_sprite.c
View File

@ -447,6 +447,17 @@ vlv_sprite_disable_arm(struct intel_dsb *dsb,
intel_de_write_fw(display, SPSURF(pipe, plane_id), 0);
}
static void vlv_sprite_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
error->ctl = intel_de_read(display, SPCNTR(crtc->pipe, plane->id));
error->surf = intel_de_read(display, SPSURF(crtc->pipe, plane->id));
error->surflive = intel_de_read(display, SPSURFLIVE(crtc->pipe, plane->id));
}
static bool
vlv_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
@ -872,6 +883,17 @@ ivb_sprite_disable_arm(struct intel_dsb *dsb,
intel_de_write_fw(display, SPRSURF(pipe), 0);
}
static void ivb_sprite_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
error->ctl = intel_de_read(display, SPRCTL(crtc->pipe));
error->surf = intel_de_read(display, SPRSURF(crtc->pipe));
error->surflive = intel_de_read(display, SPRSURFLIVE(crtc->pipe));
}
static bool
ivb_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
@ -1207,6 +1229,17 @@ g4x_sprite_disable_arm(struct intel_dsb *dsb,
intel_de_write_fw(display, DVSSURF(pipe), 0);
}
static void g4x_sprite_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
error->ctl = intel_de_read(display, DVSCNTR(crtc->pipe));
error->surf = intel_de_read(display, DVSSURF(crtc->pipe));
error->surflive = intel_de_read(display, DVSSURFLIVE(crtc->pipe));
}
static bool
g4x_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe)
@ -1587,6 +1620,7 @@ intel_sprite_plane_create(struct intel_display *display,
plane->update_noarm = vlv_sprite_update_noarm;
plane->update_arm = vlv_sprite_update_arm;
plane->disable_arm = vlv_sprite_disable_arm;
plane->capture_error = vlv_sprite_capture_error;
plane->get_hw_state = vlv_sprite_get_hw_state;
plane->check_plane = vlv_sprite_check;
plane->max_stride = i965_plane_max_stride;
@ -1610,6 +1644,7 @@ intel_sprite_plane_create(struct intel_display *display,
plane->update_noarm = ivb_sprite_update_noarm;
plane->update_arm = ivb_sprite_update_arm;
plane->disable_arm = ivb_sprite_disable_arm;
plane->capture_error = ivb_sprite_capture_error;
plane->get_hw_state = ivb_sprite_get_hw_state;
plane->check_plane = g4x_sprite_check;
@ -1634,6 +1669,7 @@ intel_sprite_plane_create(struct intel_display *display,
plane->update_noarm = g4x_sprite_update_noarm;
plane->update_arm = g4x_sprite_update_arm;
plane->disable_arm = g4x_sprite_disable_arm;
plane->capture_error = g4x_sprite_capture_error;
plane->get_hw_state = g4x_sprite_get_hw_state;
plane->check_plane = g4x_sprite_check;
plane->max_stride = g4x_sprite_max_stride;

12
drivers/gpu/drm/i915/display/skl_universal_plane.c
View File

@ -1661,6 +1661,17 @@ icl_plane_update_arm(struct intel_dsb *dsb,
skl_plane_surf(plane_state, color_plane));
}
static void skl_plane_capture_error(struct intel_crtc *crtc,
struct intel_plane *plane,
struct intel_plane_error *error)
{
struct intel_display *display = to_intel_display(plane);
error->ctl = intel_de_read(display, PLANE_CTL(crtc->pipe, plane->id));
error->surf = intel_de_read(display, PLANE_SURF(crtc->pipe, plane->id));
error->surflive = intel_de_read(display, PLANE_SURFLIVE(crtc->pipe, plane->id));
}
static void
skl_plane_async_flip(struct intel_dsb *dsb,
struct intel_plane *plane,
@ -2803,6 +2814,7 @@ skl_universal_plane_create(struct intel_display *display,
plane->update_arm = skl_plane_update_arm;
plane->disable_arm = skl_plane_disable_arm;
}
plane->capture_error = skl_plane_capture_error;
plane->get_hw_state = skl_plane_get_hw_state;
plane->check_plane = skl_plane_check;