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arm64: dts: ti: Add DT overlay for PCIe + USB2.0 SERDES personality card
Enable both SERDES and PCIe DT nodes in order to get PCIe working on the SERDES PCIe x2 personality card. The daughter card also has a USB 2.0 dual-role port. As the base board already supports a 2.0 dual-role port, enable the port on the SERDES card to be a host only port. This will prevent user confusion as having 2 ports in device mode often leads to confusion as to which port is bound to the gadget function driver. The PCIe x2 card is provided with the AM65x IDK configuration [1] so apply the overlay to k3-am654-idk.dtb [1] https://www.ti.com/lit/ug/spruim6a/spruim6a.pdf Co-developed-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Link: https://lore.kernel.org/r/20240208-for-v6-9-am65-overlays-2-0-v2-2-70bae3e91597@kernel.org Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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@ -47,7 +47,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am64-tqma64xxl-mbax4xxl-wlan.dtbo
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# Boards with AM65x SoC
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k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo
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k3-am654-evm-dtbs := k3-am654-base-board.dtb k3-am654-icssg2.dtbo
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k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo
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k3-am654-idk-dtbs := k3-am654-evm.dtb k3-am654-idk.dtbo k3-am654-pcie-usb2.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb
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@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am654-gp-evm.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am654-evm.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am654-idk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board-rocktech-rk101-panel.dtbo
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dtb-$(CONFIG_ARCH_K3) += k3-am654-pcie-usb2.dtbo
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# Boards with J7200 SoC
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k3-j7200-evm-dtbs := k3-j7200-common-proc-board.dtb k3-j7200-evm-quad-port-eth-exp.dtbo
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59
arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso
Normal file
59
arch/arm64/boot/dts/ti/k3-am654-pcie-usb2.dtso
Normal file
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@ -0,0 +1,59 @@
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/**
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* DT overlay for SERDES personality card: 2lane PCIe + USB2.0 Host on AM654 EVM
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*
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* Copyright (C) 2018-2024 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/phy/phy.h>
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#include <dt-bindings/phy/phy-am654-serdes.h>
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#include "k3-pinctrl.h"
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&serdes0 {
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assigned-clocks = <&k3_clks 153 4>,
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<&serdes0 AM654_SERDES_CMU_REFCLK>,
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<&serdes0 AM654_SERDES_RO_REFCLK>;
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assigned-clock-parents = <&k3_clks 153 8>,
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<&k3_clks 153 4>,
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<&k3_clks 153 4>;
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status = "okay";
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};
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&serdes1 {
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assigned-clocks = <&serdes1 AM654_SERDES_CMU_REFCLK>;
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assigned-clock-parents = <&serdes0 AM654_SERDES_RO_REFCLK>;
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status = "okay";
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};
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&pcie0_rc {
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num-lanes = <2>;
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phys = <&serdes0 PHY_TYPE_PCIE 1>, <&serdes1 PHY_TYPE_PCIE 1>;
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phy-names = "pcie-phy0", "pcie-phy1";
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reset-gpios = <&pca9555 5 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&main_pmx0 {
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usb0_pins_default: usb0-default-pins {
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pinctrl-single,pins = <
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AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */
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>;
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};
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};
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&dwc3_0 {
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status = "okay";
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};
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&usb0_phy {
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status = "okay";
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};
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&usb0 {
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pinctrl-names = "default";
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pinctrl-0 = <&usb0_pins_default>;
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dr_mode = "host";
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};
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