mirror of
https://github.com/torvalds/linux.git
synced 2026-06-03 03:53:37 +02:00
arm64: dts: qcom: sdm845: assign DSI clock source parents
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
parent
b547b21622
commit
3289022b32
|
|
@ -4255,6 +4255,9 @@ dsi0: dsi@ae94000 {
|
|||
"core",
|
||||
"iface",
|
||||
"bus";
|
||||
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>;
|
||||
assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
|
||||
|
||||
operating-points-v2 = <&dsi_opp_table>;
|
||||
power-domains = <&rpmhpd SDM845_CX>;
|
||||
|
||||
|
|
@ -4321,6 +4324,9 @@ dsi1: dsi@ae96000 {
|
|||
"core",
|
||||
"iface",
|
||||
"bus";
|
||||
assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>;
|
||||
assigned-clock-parents = <&dsi1_phy 0>, <&dsi1_phy 1>;
|
||||
|
||||
operating-points-v2 = <&dsi_opp_table>;
|
||||
power-domains = <&rpmhpd SDM845_CX>;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user