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arm64: dts: qcom: milos: Add LPASS LPI pinctrl node

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Add a node for the LPASS LPI pinctrl found on the Milos SoC and define a
few pinctrl states that will be used in the future.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Acked-by: Linus Walleij <linusw@kernel.org>
Link: https://lore.kernel.org/r/20260306-milos-pinctrl-lpi-v1-4-086946dbb855@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Luca Weiss 2026-03-06 15:22:18 +01:00 committed by Bjorn Andersson
parent d54331131c
commit 3272916a7c
1 changed files with 103 additions and 0 deletions
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103
arch/arm64/boot/dts/qcom/milos.dtsi
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@ -20,6 +20,7 @@
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,gpr.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
/ {
interrupt-parent = <&intc>;
@ -1307,6 +1308,108 @@ q6prmcc: clock-controller {
};
};
lpass_tlmm: pinctrl@3440000 {
compatible = "qcom,milos-lpass-lpi-pinctrl";
reg = <0x0 0x03440000 0x0 0x20000>,
<0x0 0x034d0000 0x0 0x10000>;
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&lpass_tlmm 0 0 23>;
clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
<&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
clock-names = "core",
"audio";
tx_swr_active: tx-swr-active-state {
clk-pins {
pins = "gpio0";
function = "swr_tx_clk";
drive-strength = <4>;
slew-rate = <1>;
bias-disable;
};
data-pins {
pins = "gpio1", "gpio2", "gpio14";
function = "swr_tx_data";
drive-strength = <4>;
slew-rate = <1>;
bias-bus-hold;
};
};
rx_swr_active: rx-swr-active-state {
clk-pins {
pins = "gpio3";
function = "swr_rx_clk";
drive-strength = <2>;
slew-rate = <1>;
bias-disable;
};
data-pins {
pins = "gpio4", "gpio5";
function = "swr_rx_data";
drive-strength = <2>;
slew-rate = <1>;
bias-bus-hold;
};
};
lpi_i2s2_active: lpi-i2s2-active-state {
clk-pins {
pins = "gpio10";
function = "i2s2_clk";
drive-strength = <8>;
bias-disable;
output-high;
};
ws-pins {
pins = "gpio11";
function = "i2s2_ws";
drive-strength = <8>;
bias-disable;
output-high;
};
data-pins {
pins = "gpio12", "gpio13";
function = "i2s2_data";
drive-strength = <8>;
bias-disable;
output-high;
};
};
lpi_i2s2_sleep: lpi-i2s2-sleep-state {
clk-pins {
pins = "gpio10";
function = "i2s2_clk";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
ws-pins {
pins = "gpio11";
function = "i2s2_ws";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
data-pins {
pins = "gpio12", "gpio13";
function = "i2s2_data";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
};
};
lpass_ag_noc: interconnect@3c40000 {
compatible = "qcom,milos-lpass-ag-noc";
reg = <0x0 0x03c40000 0x0 0x17200>;